A simple VFO project - circuit to follow.
LCD readout
Range: 1-60MHz ( 1 Hz steps ) Modes: Memory, VFO, Step ( 1, 10, 100, 1000, 6250, 5000 10000, 25000 , 100000, 100000 Hz)
-
Notifications
You must be signed in to change notification settings - Fork 0
sipsmi/si_sigGen
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
Folders and files
| Name | Name | Last commit message | Last commit date | |
|---|---|---|---|---|
Repository files navigation
About
No description, website, or topics provided.
Resources
Stars
Watchers
Forks
Releases
No releases published
Packages 0
No packages published