Skip to content
This repository has been archived by the owner on Jan 31, 2022. It is now read-only.

Commit

Permalink
Merge pull request #4 from evka85/master
Browse files Browse the repository at this point in the history
v1.12.5
  • Loading branch information
evka85 committed Jun 8, 2018
2 parents 6eeddba + 2470df7 commit d0dd51b
Show file tree
Hide file tree
Showing 8 changed files with 28 additions and 7 deletions.
8 changes: 5 additions & 3 deletions common/hdl/pkg/gem_pkg.vhd
Original file line number Diff line number Diff line change
Expand Up @@ -10,10 +10,10 @@ package gem_pkg is
--== Firmware version ==--
--========================--

constant C_FIRMWARE_DATE : std_logic_vector(31 downto 0) := x"20180607";
constant C_FIRMWARE_DATE : std_logic_vector(31 downto 0) := x"20180608";
constant C_FIRMWARE_MAJOR : integer range 0 to 255 := 1;
constant C_FIRMWARE_MINOR : integer range 0 to 255 := 12;
constant C_FIRMWARE_BUILD : integer range 0 to 255 := 3;
constant C_FIRMWARE_BUILD : integer range 0 to 255 := 5;

------ Change log ------
-- 1.8.6 no gbt sync procedure with oh
Expand Down Expand Up @@ -45,7 +45,9 @@ package gem_pkg is
-- 1.12.0 Added a lot of TTC clock monitoring features, including unlock counters and phase monitoring. It's also possible to reset or disable the phase alignment procedure through registers
-- 1.12.1 Changed phase_unlock detection to only trigger if the PLL lock goes low for several clock cycles (currently set at 12). Also added recording of minimum and maximum phase in phase monitor.
-- 1.12.2 Shift out of phase initially after phase alignment reset (can be disabled with a register). Also a running mean of the phase measurement was added.
-- 1.12.3 GTH PI clock phase adjustment implemented when shifting the MMCM outputs (which affects the TXUSRCLK phase). This should keep the GTH PI and TXUSRCLK reasonably in phase
-- 1.12.3 GTH PI clock phase adjustment implemented when shifting the MMCM outputs (which affects the TXUSRCLK phase). This should keep the GTH PI and TXUSRCLK reasonably in phase
-- 1.12.4 Added GTH shift count and GTH shift error registers. Also set TXDLYBYPASS = 1, and TXPIPPMSEL = 1
-- 1.12.5 Inverted the GTH shift direction w.r.t. MMCM shift direction, because in MMCM we're shifting the feedback clock, which actually shifts the outputs in the opposite direction..

--======================--
--== General ==--
Expand Down
7 changes: 7 additions & 0 deletions common/hdl/pkg/registers.vhd
Original file line number Diff line number Diff line change
Expand Up @@ -192,10 +192,17 @@ package registers is
constant REG_TTC_STATUS_CLK_GTH_PM_PHASE_JUMP_SIZE_MSB : integer := 27;
constant REG_TTC_STATUS_CLK_GTH_PM_PHASE_JUMP_SIZE_LSB : integer := 16;

constant REG_TTC_STATUS_CLK_GTH_SHIFT_ERROR_ADDR : std_logic_vector(7 downto 0) := x"2b";
constant REG_TTC_STATUS_CLK_GTH_SHIFT_ERROR_BIT : integer := 31;

constant REG_TTC_STATUS_CLK_GTH_PM_PHASE_JUMP_TIME_ADDR : std_logic_vector(7 downto 0) := x"2c";
constant REG_TTC_STATUS_CLK_GTH_PM_PHASE_JUMP_TIME_MSB : integer := 15;
constant REG_TTC_STATUS_CLK_GTH_PM_PHASE_JUMP_TIME_LSB : integer := 0;

constant REG_TTC_STATUS_CLK_GTH_SHIFT_CNT_ADDR : std_logic_vector(7 downto 0) := x"2c";
constant REG_TTC_STATUS_CLK_GTH_SHIFT_CNT_MSB : integer := 31;
constant REG_TTC_STATUS_CLK_GTH_SHIFT_CNT_LSB : integer := 16;

constant REG_TTC_STATUS_TTC_SINGLE_ERROR_CNT_ADDR : std_logic_vector(7 downto 0) := x"30";
constant REG_TTC_STATUS_TTC_SINGLE_ERROR_CNT_MSB : integer := 15;
constant REG_TTC_STATUS_TTC_SINGLE_ERROR_CNT_LSB : integer := 0;
Expand Down
2 changes: 2 additions & 0 deletions common/hdl/ttc/ttc.vhd
Original file line number Diff line number Diff line change
Expand Up @@ -507,7 +507,9 @@ begin
regs_read_arr(18)(REG_TTC_STATUS_CLK_GTH_PM_PHASE_MAX_MSB downto REG_TTC_STATUS_CLK_GTH_PM_PHASE_MAX_LSB) <= ttc_clks_status_i.pm_gth.phase_max;
regs_read_arr(19)(REG_TTC_STATUS_CLK_GTH_PM_PHASE_JUMP_CNT_MSB downto REG_TTC_STATUS_CLK_GTH_PM_PHASE_JUMP_CNT_LSB) <= ttc_clks_status_i.pm_gth.phase_jump_cnt;
regs_read_arr(19)(REG_TTC_STATUS_CLK_GTH_PM_PHASE_JUMP_SIZE_MSB downto REG_TTC_STATUS_CLK_GTH_PM_PHASE_JUMP_SIZE_LSB) <= ttc_clks_status_i.pm_gth.phase_jump_size;
regs_read_arr(19)(REG_TTC_STATUS_CLK_GTH_SHIFT_ERROR_BIT) <= ttc_clks_status_i.gth_pi_shift_error;
regs_read_arr(20)(REG_TTC_STATUS_CLK_GTH_PM_PHASE_JUMP_TIME_MSB downto REG_TTC_STATUS_CLK_GTH_PM_PHASE_JUMP_TIME_LSB) <= ttc_clks_status_i.pm_gth.phase_jump_time;
regs_read_arr(20)(REG_TTC_STATUS_CLK_GTH_SHIFT_CNT_MSB downto REG_TTC_STATUS_CLK_GTH_SHIFT_CNT_LSB) <= ttc_clks_status_i.gth_pi_shift_cnt;
regs_read_arr(21)(REG_TTC_STATUS_TTC_SINGLE_ERROR_CNT_MSB downto REG_TTC_STATUS_TTC_SINGLE_ERROR_CNT_LSB) <= ttc_status.single_err;
regs_read_arr(21)(REG_TTC_STATUS_TTC_DOUBLE_ERROR_CNT_MSB downto REG_TTC_STATUS_TTC_DOUBLE_ERROR_CNT_LSB) <= ttc_status.double_err;
regs_read_arr(22)(REG_TTC_STATUS_BC0_LOCKED_BIT) <= ttc_status.bc0_status.locked;
Expand Down
2 changes: 1 addition & 1 deletion ctp7/hdl/misc/ttc_clocks.vhd
Original file line number Diff line number Diff line change
Expand Up @@ -720,7 +720,7 @@ begin
if (gth_shift_req_dly = '1' and gth_shift_ack = '0') then
gth_shift_ack <= '1';

gth_tx_pippm_ctrl.direction <= gth_shift_dir;
gth_tx_pippm_ctrl.direction <= not gth_shift_dir; -- shifting the MMCM feedback clock forward, actually shifts the outputs backwards.. so in this case we have to shift the PMA clock also backwards..
gth_tx_pippm_ctrl.enable <= '1';
gth_shift_en_timer <= "01";

Expand Down
4 changes: 2 additions & 2 deletions ctp7/hdl/system/gth_single_4p8g.vhd
Original file line number Diff line number Diff line change
Expand Up @@ -745,7 +745,7 @@ begin
TXPIPPMEN => tx_pippm_ctrl_i.enable, --'0',
TXPIPPMOVRDEN => '0',
TXPIPPMPD => '0',
TXPIPPMSEL => '0',
TXPIPPMSEL => '1',
TXPIPPMSTEPSIZE => tx_pippm_ctrl_i.direction & tx_pippm_ctrl_i.step_size, -- "00000",
---------------------- Transceiver Reset Mode Operation --------------------
GTRESETSEL => '0',
Expand All @@ -771,7 +771,7 @@ begin
------------------ Transmit Ports - Pattern Generator Ports ----------------
TXPRBSFORCEERR => gth_tx_ctrl_i.txprbsforceerr,
------------------ Transmit Ports - TX Buffer Bypass Ports -----------------
TXDLYBYPASS => '0',
TXDLYBYPASS => '1',
TXDLYEN => gth_tx_init_i.TXDLYEN,
TXDLYHOLD => '0',
TXDLYOVRDEN => '0',
Expand Down
8 changes: 7 additions & 1 deletion scripts/address_table/gem_amc_top.xml
Original file line number Diff line number Diff line change
Expand Up @@ -135,7 +135,7 @@
description="Phase alignment: the width of the phase lock window"
fw_signal="ttc_clks_status_i.pll_lock_window"/>
<node id="PA_PHASE_SHIFT_CNT" address="0x3" mask="0xffff0000" permission="r"
description="Phase alignment: number of phase shifts done by the phase alignment FSM"
description="Phase alignment: number of phase shifts done by the phase alignment FSM (each shift corresponds to 18.6012ps)"
fw_signal="ttc_clks_status_i.phase_shift_cnt"/>
<node id="PA_PLL_LOCK_CLOCKS" address="0x4" mask="0x00ffffff" permission="r"
description="Phase alignment: number of clock cycles it took the phase monitoring PLL to lock (debugging register)"
Expand Down Expand Up @@ -197,6 +197,12 @@
<node id="GTH_PM_PHASE_JUMP_TIME" address="0xc" mask="0x0000ffff" permission="r"
description="GTH Phase monitoring: number of seconds since last phase jump"
fw_signal="ttc_clks_status_i.pm_gth.phase_jump_time"/>
<node id="GTH_SHIFT_ERROR" address="0xb" mask="0x80000000" permission="r"
description="Phase alignment: Error during GTH phase shifting"
fw_signal="ttc_clks_status_i.gth_pi_shift_error"/>
<node id="GTH_SHIFT_CNT" address="0xc" mask="0xffff0000" permission="r"
description="Phase alignment: Number of GTH shifts done since last phase alignment reset (each shift corresponds to 6.5104ps, so 20 GTH shifts matches 7 MMCM shifts)"
fw_signal="ttc_clks_status_i.gth_pi_shift_cnt"/>
</node>

<node id="TTC_SINGLE_ERROR_CNT" address="0x10" mask="0x0000ffff" permission="r"
Expand Down
2 changes: 2 additions & 0 deletions scripts/address_table/uhal_gem_amc_ctp7_amc.xml
Original file line number Diff line number Diff line change
Expand Up @@ -51,6 +51,8 @@
<node id="GTH_PM_PHASE_JUMP_CNT" address="0xb" permission="r" mask="0xffff"/>
<node id="GTH_PM_PHASE_JUMP_SIZE" address="0xb" permission="r" mask="0xfff0000"/>
<node id="GTH_PM_PHASE_JUMP_TIME" address="0xc" permission="r" mask="0xffff"/>
<node id="GTH_SHIFT_ERROR" address="0xb" permission="r" mask="0x80000000"/>
<node id="GTH_SHIFT_CNT" address="0xc" permission="r" mask="0xffff0000"/>
</node>
<node id="TTC_SINGLE_ERROR_CNT" address="0x10" permission="r" mask="0xffff"/>
<node id="TTC_DOUBLE_ERROR_CNT" address="0x10" permission="r" mask="0xffff0000"/>
Expand Down
2 changes: 2 additions & 0 deletions scripts/ctp7_bash_scripts/generated/ctp7_status.sh
Original file line number Diff line number Diff line change
Expand Up @@ -46,7 +46,9 @@ if [ "$MODULE" = "TTC" ]; then
printf 'GEM_AMC.TTC.STATUS.CLK.GTH_PM_PHASE_MAX = 0x%x\n' $(( (`mpeek 0x64c000a8` & 0x00fff000) >> 12 ))
printf 'GEM_AMC.TTC.STATUS.CLK.GTH_PM_PHASE_JUMP_CNT = 0x%x\n' $(( (`mpeek 0x64c000ac` & 0x0000ffff) >> 0 ))
printf 'GEM_AMC.TTC.STATUS.CLK.GTH_PM_PHASE_JUMP_SIZE = 0x%x\n' $(( (`mpeek 0x64c000ac` & 0x0fff0000) >> 16 ))
printf 'GEM_AMC.TTC.STATUS.CLK.GTH_SHIFT_ERROR = 0x%x\n' $(( (`mpeek 0x64c000ac` & 0x80000000) >> 31 ))
printf 'GEM_AMC.TTC.STATUS.CLK.GTH_PM_PHASE_JUMP_TIME = 0x%x\n' $(( (`mpeek 0x64c000b0` & 0x0000ffff) >> 0 ))
printf 'GEM_AMC.TTC.STATUS.CLK.GTH_SHIFT_CNT = 0x%x\n' $(( (`mpeek 0x64c000b0` & 0xffff0000) >> 16 ))
printf 'GEM_AMC.TTC.STATUS.TTC_SINGLE_ERROR_CNT = 0x%x\n' $(( (`mpeek 0x64c000c0` & 0x0000ffff) >> 0 ))
printf 'GEM_AMC.TTC.STATUS.TTC_DOUBLE_ERROR_CNT = 0x%x\n' $(( (`mpeek 0x64c000c0` & 0xffff0000) >> 16 ))
printf 'GEM_AMC.TTC.STATUS.BC0.LOCKED = 0x%x\n' $(( (`mpeek 0x64c000c4` & 0x00000001) >> 0 ))
Expand Down

0 comments on commit d0dd51b

Please sign in to comment.