Simple way to enable output of "call" pseudo instruction?

[sbeard]

Hello, I am writing an emulator for RISCV using RISCV assembly as an input. I have this working for the GCC assembly output. I like to switch to using LLVM to generate the assembly as working with LLVM is much easier when it comes time to manipulate programs; however I've hit a couple snags.

The last major obstacle I have in switching to LLVM is that it currently generates lui/addi/jalr triples in the assembly rather than the call pseudo instruction. I'm not very familiar with LLVM Machine passes and am having some trouble in switching from the triples to the pseudo op. I've traced things through to the emitCALL function in RISCVISelLowering; however, at by this point the machine IR has already converted to the LLVM IR call into instructions to load the address of the function and then CALLREG64. It seems like I need to go up one more level to where the LLVM IR is converted in this machine IR, but I'm not entirely certain where that happens.

If anyone knows of a simple way to enable this functionality, or can point me in the right direction on how to implement it or figure out where the LLVM IR is initially converted to RISCV Machine IR I would be very grateful.

Thank you!