Incorrect disassembly of ARM add instruction after function analysis

[cryslith]

Work environment

Questions	Answers
OS/arch/bits (mandatory)	NixOS x86_64
File format of the file you reverse (mandatory)	raw
Architecture/bits of the file (mandatory)	ARMeabiv7 16-bit (Thumb)
rizin -v full output, not truncated (mandatory)	rizin 0.8.0 @ linux-x86-64

note: I built rizin locally from commit c02c0b7, not sure why it isn't in the -v output.

Expected behavior

Disassembly of instruction at 0x4 should be equivalent to add r4, sp, 8, even after running function analysis.

Actual behavior

$ ./rizin -a arm -b 16 -e asm.cpu=cortexA8 test.bin
[0x00000000]> pd 5
            0x00000000      push  {r4, r5, r7, lr}
            0x00000002      sub   sp, 0x10
            0x00000004      add   r4, sp, 8
            0x00000006      add   sp, 0x10
            0x00000008      pop   {r4, r5, r7, pc}
[0x00000000]> af
[0x00000000]> pdf
┌ fcn.00000000();
│           ; var unknown_t var_18h @ stack - 0x18
│           0x00000000      push  {r4, r5, r7, lr}
│           0x00000002      sub   sp, 0x10
│           0x00000004      add   r4, var_18h
│           0x00000006      add   sp, 0x10
└           0x00000008      pop   {r4, r5, r7, pc}

Note that the disassembly of 0x4 changed after running af and is now incorrect.

Steps to reproduce the behavior

Binary: test.zip
Run commands as shown in above log.