From 8f2ce7018803bca623b1db059b4fbcfbacab7fdd Mon Sep 17 00:00:00 2001 From: Deborah Soung Date: Fri, 10 Aug 2018 13:59:01 -0700 Subject: [PATCH] allowing overrides to $random (#859) (cherry picked from commit dcb13c960cd184db4489a10ccae081b3ac5791e2) --- src/main/scala/firrtl/Emitter.scala | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/src/main/scala/firrtl/Emitter.scala b/src/main/scala/firrtl/Emitter.scala index 10d0c29315..0e83b549cd 100644 --- a/src/main/scala/firrtl/Emitter.scala +++ b/src/main/scala/firrtl/Emitter.scala @@ -685,13 +685,19 @@ class VerilogEmitter extends SeqTransform with Emitter { emit(Seq("`ifdef RANDOMIZE_MEM_INIT")) emit(Seq("`define RANDOMIZE")) emit(Seq("`endif")) + emit(Seq("`ifndef RANDOM")) + emit(Seq("`define RANDOM $random")) + emit(Seq("`endif")) emit(Seq("`ifdef RANDOMIZE")) emit(Seq(" integer initvar;")) emit(Seq(" initial begin")) + emit(Seq(" `ifdef INIT_RANDOM")) + emit(Seq(" `INIT_RANDOM")) + emit(Seq(" `endif")) // This enables test benches to set the random values at time 0.001, - // then start the simulation later + // then start the simulation later // Verilator does not support delay statements, so they are omitted. - emit(Seq(" `ifndef verilator")) + emit(Seq(" `ifndef VERILATOR")) emit(Seq(" #0.002 begin end")) emit(Seq(" `endif")) for (x <- initials) emit(Seq(tab, x))