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Bender.yml
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Bender.yml
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package:
name: ariane
authors:
- "Florian Zaruba <zarubaf@iis.ee.ethz.ch>"
- "Michael Schaffner <schaffner@iis.ee.ethz.ch>"
- "Andreas Kuster <kustera@ethz.ch>"
# WT_DCACHE
dependencies:
axi: { git: "https://github.com/pulp-platform/axi.git", version: 0.31.0 }
common_cells:
{ git: "https://github.com/pulp-platform/common_cells", version: 1.23.0 }
fpnew: { git: "https://github.com/openhwgroup/cvfpu.git", version: 0.7.0 }
tech_cells_generic:
{ git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.13 }
frozen: true
sources:
- files:
- core/include/config_pkg.sv
- target: cv64a6_imafdcv_sv39
files:
- core/include/cv64a6_imafdcv_sv39_config_pkg.sv
- core/include/riscv_pkg.sv
- core/include/ariane_pkg.sv
- core/mmu_sv39/tlb.sv
- core/mmu_sv39/mmu.sv
- core/mmu_sv39/ptw.sv
- corev_apu/tb/common/mock_uart.sv
- target: cv64a6_imafdc_sv39
files:
- core/include/cv64a6_imafdc_sv39_config_pkg.sv
- core/include/riscv_pkg.sv
- core/include/ariane_pkg.sv
- core/mmu_sv39/tlb.sv
- core/mmu_sv39/mmu.sv
- core/mmu_sv39/ptw.sv
- core/cva6_accel_first_pass_decoder_stub.sv
- target: cv64a6_imafdc_sv39_wb
files:
- core/include/cv64a6_imafdc_sv39_wb_config_pkg.sv
- core/include/riscv_pkg.sv
- core/include/ariane_pkg.sv
- core/mmu_sv39/tlb.sv
- core/mmu_sv39/mmu.sv
- core/mmu_sv39/ptw.sv
- core/cva6_accel_first_pass_decoder_stub.sv
- target: cv32a6_imac_sv0
files:
- core/include/cv32a6_imac_sv0_config_pkg.sv
- core/include/riscv_pkg.sv
- core/include/ariane_pkg.sv
- core/mmu_sv32/cva6_tlb_sv32.sv
- core/mmu_sv32/cva6_mmu_sv32.sv
- core/mmu_sv32/cva6_ptw_sv32.sv
- core/cva6_accel_first_pass_decoder_stub.sv
- target: cv32a6_imac_sv32
files:
- core/include/cv32a6_imac_sv32_config_pkg.sv
- core/include/riscv_pkg.sv
- core/include/ariane_pkg.sv
- core/mmu_sv32/cva6_tlb_sv32.sv
- core/mmu_sv32/cva6_mmu_sv32.sv
- core/mmu_sv32/cva6_ptw_sv32.sv
- core/cva6_accel_first_pass_decoder_stub.sv
- target: cv32a6_imafc_sv32
files:
- core/include/cv32a6_imafc_sv32_config_pkg.sv
- core/include/riscv_pkg.sv
- core/include/ariane_pkg.sv
- core/mmu_sv32/cva6_tlb_sv32.sv
- core/mmu_sv32/cva6_mmu_sv32.sv
- core/mmu_sv32/cva6_ptw_sv32.sv
- core/cva6_accel_first_pass_decoder_stub.sv
# included via target core/include/${TARGET_CFG}_config_pkg.sv
# ariane_axi_pkg is dependent on this.
# - vendor/pulp-platform/axi/src/axi_pkg.sv
# Packages
- core/include/wt_cache_pkg.sv
- core/include/std_cache_pkg.sv
- core/include/acc_pkg.sv
# for all the below files use Flist.cva6 as baseline and also look at Makefile pd/synth
# CVXIF
- core/include/instr_tracer_pkg.sv
- core/include/cvxif_pkg.sv
- core/cvxif_example/include/cvxif_instr_pkg.sv
- core/cvxif_fu.sv
- core/cvxif_example/cvxif_example_coprocessor.sv
- core/cvxif_example/instr_decoder.sv
# vendored deps
# - include_dirs: [vendor/pulp-platform/common_cells/include/, vendor/pulp-platform/common_cells/src/]
# files:
# - vendor/pulp-platform/common_cells/src/cf_math_pkg.sv
# - vendor/pulp-platform/common_cells/src/fifo_v3.sv
# - vendor/pulp-platform/common_cells/src/lfsr.sv
# - vendor/pulp-platform/common_cells/src/lzc.sv
# - vendor/pulp-platform/common_cells/src/rr_arb_tree.sv
# - vendor/pulp-platform/common_cells/src/shift_reg.sv
# - vendor/pulp-platform/common_cells/src/unread.sv
# - vendor/pulp-platform/common_cells/src/popcount.sv
# - vendor/pulp-platform/common_cells/src/exp_backoff.sv
# # Common Cells for example coprocessor
# - vendor/pulp-platform/common_cells/src/counter.sv
# - vendor/pulp-platform/common_cells/src/delta_counter.sv
# Floating point unit
# - vendor/openhwgroup/cvfpu/src/fpnew_pkg.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_cast_multi.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_classifier.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_divsqrt_multi.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_fma_multi.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_fma.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_noncomp.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_opgroup_block.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_opgroup_fmt_slice.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_opgroup_multifmt_slice.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_rounding.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_top.sv
# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/defs_div_sqrt_mvp.sv
# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/control_mvp.sv
# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/div_sqrt_top_mvp.sv
# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/iteration_div_sqrt_mvp.sv
# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/norm_div_sqrt_mvp.sv
# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/nrbd_nrsc_mvp.sv
# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/preprocess_mvp.sv
# Top-level source files (not necessarily instantiated at the top of the cva6).
- core/cva6.sv
- core/alu.sv
# Note: depends on fpnew_pkg, above
- core/fpu_wrap.sv
- core/branch_unit.sv
- core/compressed_decoder.sv
- core/controller.sv
- core/csr_buffer.sv
- core/csr_regfile.sv
- core/decoder.sv
- core/ex_stage.sv
- core/instr_realign.sv
- core/id_stage.sv
- core/issue_read_operands.sv
- core/issue_stage.sv
- core/load_unit.sv
- core/load_store_unit.sv
- core/lsu_bypass.sv
- core/mult.sv
- core/multiplier.sv
- core/serdiv.sv
- core/perf_counters.sv
- core/ariane_regfile_ff.sv
- core/ariane_regfile_fpga.sv
# NOTE: scoreboard.sv modified for DSIM (unchanged for other simulators)
- core/scoreboard.sv
- core/store_buffer.sv
- core/amo_buffer.sv
- core/store_unit.sv
- core/commit_stage.sv
- core/axi_shim.sv
# What is "frontend"?
- core/frontend/btb.sv
- core/frontend/bht.sv
- core/frontend/ras.sv
- core/frontend/instr_scan.sv
- core/frontend/instr_queue.sv
- core/frontend/frontend.sv
# Cache subsystem
- core/cache_subsystem/wt_dcache_ctrl.sv
- core/cache_subsystem/wt_dcache_mem.sv
- core/cache_subsystem/wt_dcache_missunit.sv
- core/cache_subsystem/wt_dcache_wbuffer.sv
- core/cache_subsystem/wt_dcache.sv
- core/cache_subsystem/cva6_icache.sv
- core/cache_subsystem/wt_cache_subsystem.sv
- core/cache_subsystem/wt_axi_adapter.sv
- core/cache_subsystem/tag_cmp.sv
- core/cache_subsystem/cva6_icache_axi_wrapper.sv
- core/cache_subsystem/axi_adapter.sv
- core/cache_subsystem/miss_handler.sv
- core/cache_subsystem/cache_ctrl.sv
- core/cache_subsystem/std_nbdcache.sv
- core/cache_subsystem/std_cache_subsystem.sv
# Physical Memory Protection
# NOTE: pmp.sv modified for DSIM (unchanged for other simulators)
- core/pmp/src/pmp.sv
- core/pmp/src/pmp_entry.sv
- include_dirs:
- common/local/util
files:
- common/local/util/sram.sv
- target: not(all(fpga, xilinx))
include_dirs:
- common/local/util
files:
- common/local/util/tc_sram_wrapper.sv
# - vendor/pulp-platform/tech_cells_generic/src/rtl/tc_sram.sv
- target: all(fpga, xilinx)
include_dirs:
- common/local/util
files:
- common/local/util/tc_sram_fpga_wrapper.sv
- target: not(synthesis)
include_dirs:
- core/include
- common/local/util
files:
# Tracer (behavioral code, not RTL)
- core/include/instr_tracer_pkg.sv
- common/local/util/instr_tracer.sv
- common/local/util/instr_tracer_if.sv
# TODO target define FPGA target + verification etc
# - target: test
# files:
# - corev_apu/riscv-dbg/src/dm_pkg.sv
# - corev_apu/tb/ariane_soc_pkg.sv
# - corev_apu/tb/ariane_axi_soc_pkg.sv
# - corev_apu/tb/ariane_testharness.sv
# - corev_apu/tb/ariane_peripherals.sv
# - corev_apu/tb/common/uart.sv
# - corev_apu/tb/common/SimDTM.sv
# - corev_apu/tb/common/SimJTAG.sv
# - target: all(fpga, xilinx)
# files:
# - corev_apu/fpga/src/ariane_peripherals_xilinx.sv
# - corev_apu/fpga/src/ariane_xilinx.sv
# - corev_apu/fpga/src/fan_ctrl.sv
# - corev_apu/fpga/src/bootrom/bootrom.sv
# - corev_apu/fpga/src/ariane-ethernet/ssio_ddr_in.sv
# - corev_apu/fpga/src/ariane-ethernet/rgmii_soc.sv
# - corev_apu/fpga/src/ariane-ethernet/axis_gmii_rx.sv
# - corev_apu/fpga/src/ariane-ethernet/oddr.sv
# - corev_apu/fpga/src/ariane-ethernet/axis_gmii_tx.sv
# - corev_apu/fpga/src/ariane-ethernet/dualmem_widen8.sv
# - corev_apu/fpga/src/ariane-ethernet/rgmii_phy_if.sv
# - corev_apu/fpga/src/ariane-ethernet/dualmem_widen.sv
# - corev_apu/fpga/src/ariane-ethernet/rgmii_lfsr.sv
# - corev_apu/fpga/src/ariane-ethernet/rgmii_core.sv
# - corev_apu/fpga/src/ariane-ethernet/eth_mac_1g.sv
# - corev_apu/fpga/src/ariane-ethernet/eth_mac_1g_rgmii.sv
# - corev_apu/fpga/src/ariane-ethernet/eth_mac_1g_rgmii_fifo.sv
# - corev_apu/fpga/src/ariane-ethernet/iddr.sv
# - corev_apu/fpga/src/ariane-ethernet/framing_top.sv
# - corev_apu/fpga/src/apb_uart/src/apb_uart.vhd
# - corev_apu/fpga/src/apb_uart/src/uart_transmitter.vhd
# - corev_apu/fpga/src/apb_uart/src/uart_interrupt.vhd
# - corev_apu/fpga/src/apb_uart/src/slib_mv_filter.vhd
# - corev_apu/fpga/src/apb_uart/src/slib_input_filter.vhd
# - corev_apu/fpga/src/apb_uart/src/slib_counter.vhd
# - corev_apu/fpga/src/apb_uart/src/uart_receiver.vhd
# - corev_apu/fpga/src/apb_uart/src/slib_input_sync.vhd
# - corev_apu/fpga/src/apb_uart/src/slib_edge_detect.vhd
# - corev_apu/fpga/src/apb_uart/src/slib_clock_div.vhd
# - corev_apu/fpga/src/apb_uart/src/slib_fifo.vhd
# - corev_apu/fpga/src/apb_uart/src/uart_baudgen.vhd