+
+
eSim
+An open source EDA tool for circuit design,
+simulation, analysis and PCB design
+
+
+eSim User Manual
+version 1.0.0
+Prepared By:
+eSim Team
+FOSSEE at IIT,Bombay
+
+Indian Institute of Technology Bombay
+
+August 2015
| ADC | Analog to Digital Converter |
-
| BJT | Bipolar Junction Transistor |
-
| BV | Breakdown Voltage |
-
| CCCS | Current Controlled Current Source |
| CCVS | Current Controlled Voltage Source |
-
| CPU | Central Processing Unit |
-
| DAC | Digital to Analog Converter |
-
| DRC | Design Rules Check |
-
| DXF | Drawing Interchange Format or Drawing Exchange Format |
-
| EDA | Electronic Design Automation |
-
| ERC | Electric Rules Check |
| FOSS | Free and Open Source Software |
-
| FPGA | Field Programmable Gate Array |
-
| gEDA | Electronic Design Automation released under GPL |
-
| GUI | Graphical User Interface |
-
| HDL | Hardware Descrition Language |
-
| HPGL | Hewlett-Packard Graphics Language |
-
| IC | Integrated Circuit |
-
| ICT | Information and Communication Technology |
-
| IGBT | Insulated Gate Bipolar Transistor |
-
| JFET | Junction Field Effect Transistor |
| KCE | Kirchoff’s Current Law |
-
| KVE | Kirchoff’s Voltage Law |
-
| LXDE | Lightweight X11 Desktop Environment |
-
| MNA | Modified Nodal Analysis |
-
| MOSFET | Metal Oxide Semiconductor Field Effect Transistor |
| NMEICT | National Mission on Education through ICT |
-
| Op-amp | Operational Amplifier |
-
| PCB | Printed Circuit Board |
| RS | Ohmic Resistance |
-
| SELF | Spoken Tutorial based Education and Learning through Free -FOSS study |
-
| SVF | Serial Vector Format |
| T10KT | Teach 10,000 Teachers |
-
| VCCS | Voltage Controlled Current Source |
-
| VCVS | Voltage Controlled Voltage source |
-
- - -
+
Let us see the steps involved in EDA. In the first stage, the specifications of the system are + id="dx1-2002"> In the first stage, the specifications of the system are laid out. These specifications are then converted to a design. The design could be in the form of a circuit schematic, logical description using an HDL language, etc. The design is then simulated and re-designed, if needed, to achieve the desired @@ -337,14 +190,14 @@
A person who builds an electronic system has to first design the circuit, produce a virtual representation of it through a schematic for easy comprehension, simulate it and finally convert it into a Printed Circuit Board (PCB). There are various tools available that help do -this. Some of the popular EDA tools are those of
There are various tools available that will help +us do this. Some of the popular EDA tools are those of Cadence, Synopys, Mentor Graphics and -Xilinx. Although these are fairly comprehensive and high end, their licenses are expensive, -being proprietary. +class="cmtt-10x-x-109">Mentor Graphics +and Xilinx. Although these are fairly comprehensive and high end, their licenses are +expensive, being proprietary. There are some free and open source EDA tools like gEDA, KiCad and Chapter 1 eSim is a free and open source EDA tool. It is an acronym for Open source computer
-aided design. eSim is created using open source software packages, such as KiCad, Ngspice,
-Scilab and Python. Using eSim, one can create circuit schematics, perform simulations and
-design PCB layouts. It can create or edit new device models, and create or edit subcircuits for
-simulation. This feature is unique to eSim. Because of these reasons, eSim is expected to
-be useful to students, teachers and other professionals who would want to study
-and/or design electronic systems. eSim is also useful for entrepreneurs and small scale
-enterprises who do not have the capability to invest in heavily priced proprietary
-tools.
+class="cmbx-10x-x-109">E
Because of these reasons, eSim is expected to be useful for students, teachers and other +professionals who would want to study and/or design electronic systems. eSim is also useful +for entrepreneurs and small scale enterprises who do not have the capability to invest in +heavily priced proprietary tools.
This book introduces eSim to the reader and illustrates all the features of eSim with examples. Chapter 2 gives step by step instructions to install eSim on a typical computer +href="#x1-30002">2 gives step by step instructions to install eSim on a typical computer system and to validate the installation. The software architecture of eSim is presented in Chapter 3. Chapter 4 gets the user started with eSim. It takes them through a tour of eSim - -with the help of a simple RC circuit example. Chapter 5 explains how to create circuit -schematics using eSim, in detail using examples. Chapter 6 illustrates how to simulate -circuits using eSim. Chapter 7 explains PCB design using eSim, in detail. The advanced -features of eSim such as Model Builder covered in Chapter 8 and Sub circuiting -is covered in Chapter 9. Appendix A presents examples, that have been worked -out using eSim, from the book Microelectronic Circuits by Sedra and Smith - [1]. -
The following convention has been adopted throughout this book. All the menu names,
-options under each menu item, tool names, certain points to be noted, etc., are given in
-italics. Some keywords, names of certain windows/dialog boxes, names of some
-files/projects/folders, messages displayed during an activity, names of websites, component
-references, etc., are given in typewriter font. Some key presses, e.g. 3. Chapter 4 gets the user started with eSim. It takes them through a tour
+
+of eSim with the help of a simple RC circuit example. Chapter 5 illustrates how
+to simulate circuits. Chapter 6 explains PCB design using eSim, in detail. The
+advanced features of eSim such as Model Builder covered in Chapter 7 and Sub
+circuiting is covered in Chapter 8. Chapter 9 illustrates how to use eSim for solving
+problems.
+ The following convention has been adopted throughout this manual.All the
+menu names, options under each menu item, tool names, certain points to be noted,
+etc., are given in italics. Some keywords, names of certain windows/dialog boxes,
+names of some files/projects/folders, messages displayed during an activity, names
+of websites, component references, etc., are given in typewriter font. Some key
+presses, e.g. Enter key, F1 key, y for
-yes, etc., are also mentioned in typewriter font.
+class="cmtt-10x-x-109">y
-
eSim is a CAD tool that helps electronic system designers to design, test and analyse their + id="dx1-4001">tool that helps electronic system designers to design, test and analyse their circuits. But the important feature of this tool is that it is open source and hence the user can modify the source as per his/her need. The software provides a generic, modular and extensible platform for experiment with electronic circuits. This software runs on all -Ubuntu Linux distributions. It uses Python, KiCad, Ngspice and Scilab (5.4.0 or -above). -
The objective behind the development of eSim is to provide an open source EDA solution +class="cmtt-10x-x-109">KiCad and +Ngspice. +
The objective behind the development of eSim is to provide an open source EDA solution for electronics and electrical engineers. The software should be capable of performing schematic creation, PCB design and circuit simulation (analog, digital and mixed signal). It -should provide facilities to create new models and components. In addition to this, it should -have the capability to explain the circuit by giving symbolic equations and numerical -values. The architecture of eSim has been designed by keeping these objectives in -mind. +should provide facilities to create new models and components. The architecture of eSim has +been designed by keeping these objectives in mind.
Various open-source tools have been used for the underlying build-up of eSim. In this section + id="x1-50003.1">Modules used in eSim +
Various open-source tools have been used for the underlying build-up of eSim. In this section we will give a brief idea about all the modules used in eSim. -
+
EEschema is an integrated software where all functions of circuit drawing, control, layout, -library management and access to the PCB design software are carried out within itself. It is -the schematic editor tool used in KiCad [11]. EEschema is intended to work with PCB -layout software such as Pcbnew. It provides netlist that describes the electrical connections of -the PCB. EEschema also integrates a component editor which allows the creation, editing and + id="dx1-6002"> +
Eeschema is an integrated software where all functions of circuit drawing, control, layout,
+library management and access to the PCB design software are carried out. It is the
+schematic editor tool used in KiCad [11]. Eeschema is intended to work with PCB layout
+software such as Pcbnew. It provides netlist that describes the electrical connections of the
+PCB. Eeschema also integrates a component editor which allows the creation, editing and
visualization of components. It also allows the user to effectively handle the symbol
-libraries i.e; import, export, addition and deletion of library components. EEschema
+libraries i.e; import, export, addition and deletion of library components. Eeschema
also integrates the following additional but essential functions needed for a modern
schematic capture software: 1. Design rules check (1. Design rules check (DRC) for the automatic control of
incorrect connections and inputs of components left unconnected. 2. Generation of
+ id="x1-6005r2">2. Generation of
layout files in POSTSCRIPT or or HPGL format. 3. Generation of layout files printable via
+ id="dx1-6007">format. 3. Generation of layout files printable via
printer. 4. Bill of material generation. 5. Netlist generation for PCB layout or for
+ id="x1-6009r4">4. Bill of material generation. 5. Netlist generation for PCB layout or for
simulation.
This module is indicated by the label 1 in Fig. 3.1.
- As Eeschema is originally intended for PCB Design, there are no fictitious
+href="#x1-130011">3.1.
+ As Eeschema is originally intended for PCB Design, there are no fictitious
components1
+href="esim2.html#fn1x3">1 CvPcb is a tool that allows the user to associate components in the schematic to component
+ id="dx1-7001">
+ CvPcb is a tool that allows the user to associate components in the schematic to component
footprints when designing the printed circuit board. CvPcb is the footprint editor tool in
KiCad [11]. Typically the netlist file generated by EEschema does not specify which printed
+href="#Xeeschema">11]3.1.2 CvPcb
+ id="x1-70003.1.2">CvPcb
-
+href="#x1-130011">3.1. +
Pcbnew is a powerful printed circuit board software tool. It is the layout editor tool + id="dx1-8001"> +
Pcbnew is a powerful printed circuit board software tool. It is the layout editor tool used in KiCad [11]. It is used in association with the schematic capture software -EEschema, which provides the netlist. Netlist describes the electrical connections of +Eeschema, which provides the netlist. Netlist describes the electrical connections of the circuit. CvPcb is used to assign each component, in the netlist produced by -EEschema, to a module that is used by Pcbnew. The features of Pcbnew are given +Eeschema, to a module that is used by Pcbnew. The features of Pcbnew are given below:
This module is indicated by the label 4 in Fig. 3.1. +
This module is indicated by the label 4 in Fig. 3.1.
It converts KiCad generated netlists to Ngspice compatible format. Also it facilitates adding -model library of components and subcircuits. Following are the different functionality lies -under conversion. -
This feature helps the user to perform different types of analysis such as Operating -point analysis, DC analysis, AC analysis, transient analysis, etc. It has the facility -to -
-
eSim sources are added from eSim-sources package. Sources auch as SINE, AC, DC, PULSE -are in this library. Input to all the sources added in the circuit are given in source -details. -
eSim adds Ngspice model using this facility. -
Devices like Diode, JFET, MOSFET, IGBT, MOS etc added in the circuit can be modeled -using device model libraries. eSim also provides editing and adding new model libraries. While -converting Kicad to Ngspice these library files added to the corresponding devices used in the -circuit. - -
Subcircuits are the circuits within a circuits. Subcircuiting helps to reuse the part of the -circuits. The sub circuit in the main circuits are added using this facility. Also, eSim provides -us with editing the already existing subcircuits. Sub circuits are saved separately in different -folders. + id="x1-90003.1.4">KiCad to Ngspice converter +
We can provide analysis parameters, and the source details through this module. It also +allows us to add and edit the device models and subcircuits, included in the circuit +schematic. Finally, this module facilitates the conversion of KiCad netlist to Ngspice +compatible ones. It is developed by us for eSim and it is indicated by the label 7 in +Fig. 3.1. +
This tool provides the facility to define a new model for devices such as, 1. Diode 2. Bipolar + id="dx1-10001"> +
This tool provides the facility to define a new model for devices such as, 1. Diode 2. Bipolar Junction Transistor (BJT) 3. Metal Oxide Semiconductor Field Effect Transistor + id="x1-10004r3">3. Metal Oxide Semiconductor Field Effect Transistor (MOSFET) 4. Junction Field Effect Transistor (JFET) 5. IGBT and 6. Magnetic + id="x1-10005r4">4. Junction Field Effect Transistor (JFET) 5. IGBT and 6. Magnetic core. This module also helps edit existing models. It is developed by us for eSim and it is indicated by the label 5 in Fig. 3.1. -
+href="#x1-130011">3.1. +
This module allows the user to create a subcircuit for a component. Once the subcircuit for a + id="dx1-11001"> +
This module allows the user to create a subcircuit for a component. Once the subcircuit for a component is created, the user can use it in other circuits. It has the facility to define new components such as, Op-amps and IC-555. This component also helps edit existing subcircuits. This module is developed by us for eSim and it is indicated by the label 6 in Fig. 3.1. -
+href="#x1-130011">3.1. +
It converts KiCad generated netlists to Ngspice (see Sec. 3.1.8) compatible format. It has the -capability to 1. Insert parameters for fictitious components 2. Convert IC into discrete -blocks 3. Insert D-A and A-D converter at appropriate places 4. Insert plotting -and printing statements in netlist and 5. Find current through all components. -
This module is developed by us for eSim and it is indicated by the label 7 in -Fig. 3.1. - -
-
Ngspice is a general purpose circuit simulation program for nonlinear dc, nonlinear transient,
-and linear ac analyses [
+ Ngspice is a general purpose circuit simulation program for nonlinear dc, nonlinear transient,
+and linear ac analysis [12]. Circuits may contain resistors, capacitors, inductors, mutual
inductors, independent voltage and current sources, four types of dependent sources, lossless
and lossy transmission lines (two separate implementations), switches, uniform
+
distributed RC lines, and the five most common semiconductor devices: diodes,
BJTs, JFETs, MESFETs, and MOSFET. This module is indicated by the label 9 in
+ id="dx1-12002">BJTs, JFETs, MESFETs, and MOSFET. This module is indicated by the label 9 in
Fig. 3.1.
-
+href="#x1-130011">3.1.
+
Fig. 3.1 shows the work flow in eSim. The block diagram consists of mainly three
+ id="x1-130003.2">Work flow of eSim
+ Fig. 3.1 shows the work flow in eSim. The block diagram consists of mainly three
parts:
Here we explain the role of each block in designing electronic systems. Circuit design is the
+ Here we explain the role of each block in designing electronic systems. Circuit design is the
first step in the design of an electronic circuit. Generally a circuit diagram is drawn on a
-paper, and then entered into a computer using a schematic editor. EEschema is the schematic
-editor for eSim. Thus all the functionalities of EEschema are naturally available in eSim.
+paper, and then entered into a computer using a schematic editor. Eeschema is the schematic
+editor for eSim. Thus all the functionalities of Eeschema are naturally available in eSim.
- Libraries for components, explicitly or implicitly supported by Ngspice, have been created
-using the features of EEschema. As EEschema is originally intended for PCB design, there are
+ id="dx1-13002">
+ Libraries for components, explicitly or implicitly supported by Ngspice, have been created
+using the features of Eeschema. As Eeschema is originally intended for PCB design, there are
no fictitious components such as voltage or current sources. Thus, a new library for different
types of voltage and current sources such as sine, pulse and square wave, has been added in
eSim. A library which gives the functionality of printing and plotting has also been
created.
- The schematic editor provides a netlist file, which describes the electrical connections of
+ The schematic editor provides a netlist file, which describes the electrical connections of
the design. In order to create a PCB layout, physical components are required to be mapped
into their footprints. To perform component to footprint mapping, CvPcb is used. Footprints
have been created for the components in the newly created libraries. Pcbnew is used to draw
a PCB layout.
- After designing a circuit, it is essential to check the integrity of the circuit design. In the
+ After designing a circuit, it is essential to check the integrity of the circuit design. In the
case of large electronic circuits, breadboard testing is impractical. In such cases, electronic
system designers rely heavily on simulation. The accuracy of the simulation results can be
increased by accurate modeling of the circuit elements. Model Builder provides the facility to
define a new model for devices and edit existing models. Complex circuit elements can be
created by hierarchical modeling. Subcircuit Builder provides an easy way to create a
subcircuit.
- The netlist generated by Schematic Editor cannot be directly used for simulation
-due to compatibility issues. Netlist Converter converts it into Ngspice compatible
-format. The type of simulation to be performed and the corresponding options are
-provided through a graphical user interface (GUI). This is called Analysis Inserter in
+ The netlist generated by Schematic Editor cannot be directly used for simulation due to
+compatibility issues. Netlist Converter converts it into Ngspice compatible format. The
+type of simulation to be performed and the corresponding options are provided
+through a graphical user interface (GUI). This is called KiCad to Ngspice Converter in
eSim.
- eSim uses Ngspice for analog, digital, mixed-level/mixed-signal circuit simulation. Ngspice
+ eSim uses Ngspice for analog, digital, mixed-level/mixed-signal circuit simulation. Ngspice
is based on three open source software packages [14]:
It is a part of gEDA project. Ngspice is capable of simulating devices with BSIM, EKV, HICUM,
+ It is a part of gEDA project. Ngspice is capable of simulating devices with BSIM, EKV, HICUM,
HiSim, PSP, and PTM models. It is widely used due to its accuracy even for the latest
+ id="dx1-13007">PSP, and PTM models. It is widely used due to its accuracy even for the latest
technology devices.
In this chapter we will get started with eSim. We will run through the various options
available with an example circuit. Referring to this chapter will make one familiar with
eSim and will help plan the project before actually designing a circuit. Lets get
started.
After installation is completed, when the eSim is run the first window that appears is
-workspace dialog as shown in Fig. 4.1. After installation is completed, to launch eSim 1. Go to terminal. The default eSim-Workspace can be chosen if the ok or cancel button is clicked. Else to
-create new workspace browse button is used.
+class="content">eSim-Workspace The default workspace is eSim-Workspace under home directory. To create new workspace
+use browse option.
The main GUI window of eSim is as shown in Fig. 4.2 The eSim main GUI window consists the following symbols.
+ The eSim main window consists of the following symbols.
However, if an already existing project is opened, one would get the schematic
- editor window along with a Load error. This is illustrated in Fig. 4.4. This
- error occurs because the schematic that is opened has not been loaded with
- the libraries mentioned in the Load Error message. Close the Load Error
- message by clicking on the Close button. The RC circuit diagram opens up
- as shown in Fig. 4.5. Now the circuit schematic can be created/edited. To
- know how to use the schematic editor to create circuit schematics, refer to
- Chapter 5.
- 3.2 Work flow of eSim
-
-3.2 PCB Layout Editor
+ id="x1-130011">
-
-
Figure 3.1: Work flow in eSim. Boxes with dotted lines denote the modules developed
-in this work.
+class="content">Work flow in eSim. (Boxes with dotted lines denote the modules developed
+in this work).
-
+
@@ -753,70 +537,70 @@
-3.2
Chapter 4
+ id="x1-140004">Getting Started
Getting Started4.1 eSim Main Window
+ id="x1-150004.1">eSim Main Window
4.1.1 Workspace
-How to launch eSim in Ubuntu?
+
+
+
2. Type esim and hit enter.
The first window that appears is workspace dialog as shown in Fig. 4.1.
-
+4.1.2 Main-GUI
-
-
+4.1.2
Toolbar
-
-
file in the same project directory.
-
+
+
+
+
Note that KiCad to Ngspice Converter can only be used if current project has
+ created the KiCad spice netlist file .cir.
+
The details of tabs under KiCad to Ngspice converter are as follows:
+
This feature helps the user to perform different types of analysis such as Operating + point analysis, DC analysis, AC analysis, transient analysis. It has the facility + to +
+
eSim sources are added from eSim_Sources library. Source such as SINE, AC, DC, Convert key. It will generate .cir.out and .cir.ckt files in the same project - directory. +class="cmti-10x-x-109">PULSE are in this library. The parameter values to all the sources added in the + shcematic can be given through ’Source Details’. + +
+
Ngspice has in built model such as flipflop(D,SR,JK,T),gain,summer etc. which can be + utilised while building a circuit. eSim allows to add and modify Ngspice model + parameter through Ngspice Model tab. +
+
Devices like Diode, JFET, MOSFET, IGBT, MOS etc used in the circuit can be + modeled using device model libraries. eSim also provides editing and adding new model + libraries. While converting KiCad to Ngspice, these library files are added to the + corresponding devices used in the circuit. +
+
Subcircuits are circuits within circuit. Subcircuiting helps to reuse the parts of the + circuits. The subcircuits in the main circuits are added using this facility. Also, eSim + provides us with the facility to edit already existing subcircuits. -
Open the project RC_pcb available in the Examples folder downloaded from the eSim - website. On clicking the Footprint Editor tool, we see the corresponding RC_pcb.net file - for RC circuit. This window is shown in Fig. 4.7. The main purpose of this window is to - let one choose the footprints for the various components in the circuit. Let us view the - footprint C1 for capacitor C1. Click on C1 from the right hand side of CvPcb - window. Click on View Selected Footprint tool from the tool bar of CvPcb - window. This will show the footprint corresponding to C1. This is illustrated in - Fig. 4.8. To know more about how to assign footprints to components, see - Chapter 7. -
To create a new model library New button is clicked which then opens the template - library folder. We can choose from the template library that can be edited, to create the - new library and the click on Save to save the edited model library. Also the existing - library can be edited using Edit option. The user can also use their own library by - uploading it using Upload button. -
+
+
Project explorer has tree of all the project previously added in it. On right clicking the + project we can simply remove or refresh the project in the explorer. Also on + double/right clicking, the project file can be opened in the text editor which can then be + edited. +
+
This area is used to open the following windows. +
+
Console area provides information about the activity done in current project.
-
-
Project explorer has tree of all the project previously added in it. On right clicking -the project we can simply remove or refresh the project in the explorer. Also on -right clicking the project file can be opened in the text editor which can then be -edited. - -
-
-
Console area provides with the errors and active commands running. - -
Fig. 5.1 shows the schematic editor and the various menu and toolbars. We will explain them +href="#x1-290011">5.1 shows the schematic editor and the various menu and toolbars. We will explain them briefly in this section.
The top menu bar will be available at the top left corner. Some of the important menu options in the top menu bar are:
@@ -1174,14 +882,14 @@
Some of the important tools in the top toolbar are discussed below. They are marked in Fig. 5.3.
The toolbar on the right side of the schematic editor window has many important tools. Some of them are marked in Fig. 5.4.
Let us now look at each of these tools and their uses.
Some of the important tools in the toolbar on the left are discussed below. They are marked in Fig. 5.5.
!Schematic Editor A set of keyboard keys are associated with various operations in the
-schematic editor. These keys save time and make it easy to switch from one operation to
-another. The list of hotkeys can be viewed by going to Preferences in the top menu bar.
-Choose Hotkeys and select List current keys. The hotkeys can also be edited by selecting the
-option Hotkeys
+ A set of keyboard keys are associated with various operations in the schematic editor. These
+keys save time and make it easy to switch from one operation to another. The list of hotkeys
+can be viewed by going to Preferences in the top menu bar. Choose Hotkeys and
+select List current keys. The hotkeys can also be edited by selecting the option
+Edit Hotkeys. Some frequently used hotkeys, along with their functions, are given
below:
@@ -1394,154 +1098,146 @@
.
5.1.5 Note: Both lower and upper-case keys will work as hotkeys
There are certain differences between the schematic created for simulation and that created -for PCB design. We need certain components like plots and current sources. for simulation -whereas these are not needed for PCB design. For PCB design, we would require -connectors (e.g. DB15 and 2 pin connector) for taking signals in and out of the -PCB whereas these have no meaning in simulation. This section covers schematic -creation for simulation. Refer to Chapter 7 to know how to create schematic for PCB -design. +for PCB design. We need certain components like plots and current sources. For simulation +whereas these are not needed for PCB design. For PCB design, we would require connectors +(e.g. DB15 and 2 pin connector) for taking signals in and out of the PCB whereas +these have no meaning in simulation. This section covers schematic creation for +simulation.
The first step in the creation of circuit schematic is the selection and placement of -required components. Let us see this using an example. Let us create the circuit schematic of -an RC filter given in Fig. 5.6 and do a transient simulation.
We would need a resistor, a capacitor, a voltage source, ground terminal and some -plot components. To place a resistor on the schematic editor window, select the -Placea component tool from the toolbar on the right side and click anywhere on -the schematic editor. This opens up the component selection window. (The above -action can also be performed by pressing the key A.) Type R in the field Name of -the component selection window as shown in Fig. 5.7. Click on OK. A resistor + id="x1-360005.2.1">Selection and placement of components + +
We would need a resistor, a capacitor, a voltage source, ground terminal. To place a resistor +on the schematic editor window, select the Place a component tool from the toolbar +on the right side and click anywhere on the schematic editor. This opens up the +component selection window. Resistor component can be found under eSim_Devices +library. Fig. 5.7 shows the selection of resistor component. Click on OK. A resistor will be tied to the cursor. Place the resistor on the schematic editor by a single click. -
To place the next component, i.e., capacitor, click again on the schematic editor. Type C -in the Name field of component selection window. Click on OK. Place the capacitor -on the schematic editor by a single click. Let us now place a sinusoidal voltage -source. This is required for performing transient analysis. To place it, click again -on the schematic editor. On the component selection window, click on List all. -Choose the library sourcesSpice by double clicking on it. Select the component -SINE and click on OK. Place the sine source on the schematic editor by a single -click. -
Place the component by clicking on the schematic editor. Similarly place a ground -terminal gnd from the library power. It can also be placed using the Place a power port tool -from the toolbar on the right. Click anywhere on the editor after selecting place a power port -tool. Click List all and choose gnd. Once all the components are placed, the schematic editor -would look like the Fig. 5.8.
To place the next component, i.e., capacitor, click again on the schematic editor.Similarly, +Capacitor component is found under eSim_Devices library. Click on OK. Place the capacitor +on the schematic editor by a single click. Let us now place a sinusoidal voltage source. This is +required for performing transient analysis. To place it, click again on the schematic editor. On +the component selection window, choose the library eSim_source by double clicking on it. +Select the component SINE and click on OK. Place the sine source on the schematic editor by +a single click. +
Place the component by clicking on the schematic editor. Similarly place gnd, a ground +terminal and power_flag under power library. Once all the components are placed, the +schematic editor would look like the Fig. 5.8.
Let us rotate the resistor to complete the circuit as shown in Fig. 5.6. To rotate the -resistor, place the cursor on the resistor and press the key R. Note that if the cursor is placed -above the letter R (not R?) on the resistor, it asks to clarify selection. Choose the option +class="content">All RC circuit components placed + +
Let us rotate the resistor to complete the circuit. To rotate the resistor, place the cursor +on the resistor and press the key R. Note that if the cursor is placed above the letter R (not Component R. This can be avoided by placing the cursor slightly away from the letter R as -shown in Fig. 5.9. This applies to all components.
If one wants to move a component, place the cursor on top of the component and press the +
If one wants to move a component, place the cursor on top of the component and press the key M. The component will be tied to the cursor and can be moved in any direction. + id="dx1-36006">
The next step is to wire the connections. Let us connect the resistor to the capacitor. + id="dx1-37001"> +
The next step is to wire the connections. Let us connect the resistor to the capacitor. To do so, point the cursor to the terminal of resistor to be connected and press the key W. It has now changed to the wiring mode. Move the cursor towards the terminal of the capacitor and click on it. A wire is formed as shown in Fig. 5.10a. +href="#x1-37002r1">5.10a.
+
5.2.2 Initial
stages
5.2.2 Wiring
done
5.2.2 _FLAG
Similarly connect the wires between all terminals and the final schematic would look like +
Similarly connect the wires between all terminals and the final schematic would look like Fig. 5.10b. +href="#x1-37003r2">5.10b.
We need to assign values to the components in our circuit i.e., resistor and capacitor. Note + id="dx1-38001"> +
We need to assign values to the components in our circuit i.e., resistor and capacitor. Note
that the sine voltage source has been placed for simulation. The specifications of sine source
will be given during simulation. To assign value to the resistor, place the cursor above the
letter 5.2.3 1k in the Edit value field box
as shown in Fig. 5.11. 1k means 15.11. 1k means 1kΩ. Similarly give the value 1u for the capacitor. 1u means
1μF.
- The next step is to annotate the schematic. Annotation gives unique references to the
+ id="dx1-39004">
+ The next step is to annotate the schematic. Annotation gives unique references to the
components. To annotate the schematic, click on Annotate schematic tool from the
-top toolbar. Click on annotation, then click on OK and finally click on close as
+top toolbar. Click on annotation, then click on OK and finally click on close as
shown in Fig. 5.13. The schematic is now annotated. The question marks next to
+href="#x1-3900813">5.13. The schematic is now annotated. The question marks next to
component references have been replaced by unique numbers. If there are more than
one instance of a component (say resistor), the annotation will be done as R1, R2,
etc.
- Let us now do Let us now do ERC or Electric Rules Check. To do so, click on Perform electric rules
check tool from the top toolbar. Click on Test Erc button. The error as shown in Fig. 5.12
+href="#x1-3900712">5.12
may be displayed. Click on close in the test erc window. There will be a green arrow pointing to the source of error in the schematic. Here it points
+ There will be a green arrow pointing to the source of error in the schematic. Here it points
to the ground terminal. This is shown in Fig. 5.14. To correct this error, place a To correct this error, place a PWR_FLAG from the EEschema library _FLAG from the Eeschema library power. Connect the
+ id="dx1-39010">Connect the
power flag to the ground terminal as shown in Fig. 5.10c. More information about
-PWR_FLAG is given in Sec. ??. One needs to place 5.10c. One needs to place PWR_FLAG wherever the error shown in
-Fig. 5.12 is obtained. Repeat the ERC. Now there are no errors. With this we have created
-the schematic for simulation.
+class="cmtt-10x-x-109">_FLAG
+wherever the error shown in Fig. 5.12 is obtained. Repeat the ERC. Now there are no errors.
+With this we have created the schematic for simulation.
To simulate the circuit that has been created in the previous section, we need to generate its
+ id="dx1-40001">
+ To simulate the circuit that has been created in the previous section, we need to generate its
netlist. Netlist is a list of components in the schematic along with their connection
information. To do so, click on the To do so, click on the Generate netlist tool from the top toolbar. Click on spice
-from the window that opens up. Uncheck the option Default Format. Then click on Netlist.
+class="cmti-10x-x-109">Generate.
This is shown in Fig. 5.15. Save the netlist. This will be a 5.15. Save the netlist. This will be a .cir file. Do not change the
directory while saving. Now the netlist is ready to be simulated. Chapter 6 explains how to perform simulations.
-Refer to [ Now the netlist is ready to be simulated. Refer to [15] or [16] to know more about EEschema.
-
+href="#Xkicad2">16 In the following sections, we shall describe each of the above steps.
+ id="x1-410006">PCB Design Printed Circuit Board (PCB) design is an important step in
+electronic system design. Every component of the circuit needs to be placed and connections
+routed to minimise delay and area. Each component has an associated footprint. Footprint
+refers to the physical layout of a component that is required to mount it on the PCB. PCB
+design involves associating footprints to all components, placing them appropriately to
+minimise wire length and area, connecting the footprints using tracks/vias and finally
+extracting the required files needed for printing the PCB. Let us see the steps to design PCB
+using eSim.
In order to simulate a circuit, the user must define the type of analysis to be done on the
-circuit. The types of analysis include Operating point analysis, DC analysis,
-AC analysis, transient analysis, etc. The user should also specify the options
-
-corresponding to each analysis. This is facilitated by the Analysis Inserter tool in
-eSim.
- Analysis Inserter generates the commands for Ngspice. When one clicks on Kicad to
-Ngspice from the eSim toolbar, one gets the Analysis Inserter GUI as shown in Fig. 6.1. The
-various tabs in this GUI correspond to the various types of analysis. The user can enter
-the details, needed to perform simulation, in the corresponding fields under these
-tabs.
- In Chapter 9, we will see the differences between schematic for simulation and schematic for
+PCB design. Let us design the PCB for a RC circuit. A resistor, capacitor, ground, power flag
+and a connector are required. Connectors are used to take signals in and out of the
+PCB.
+ Create the circuit schematic as shown in Fig. 6.1. The two pin connector (CONN_2) can
+be placed from the Eeschema library conn. Do the annotation and test for ERC. Refer to
+Chapter 9 to know more about basic steps in schematic creation.
+ eSim supports three types of analyses: 1. DC Analysis (Operating Point and DC Sweep)
+ id="x1-430006.1.1">Netlist generation for PCB
2. AC Small-signal Analysis 3. Transient Analysis.
-Other analysis in the Analysis Inserter are currently under progress. The different types of
-analyses supported in eSim are explained below [17].
-
- The DC analysis determines the dc operating point of the circuit with inductors shorted and
-capacitors opened. The DC analysis options are specified on the .dc and .op control
-lines.
- There is assumed to be no time dependence on any of the sources within the system
-description. The simulator algorithm subdivides the circuit into those portions which require
+ id="dx1-43002">
+ The netlist for PCB is different from that for simulation. To generate netlist for PCB, click on
the analog simulator algorithm and those which require the event-driven algorithm.
-Each subsystem block is then iterated to solution, with the interfaces between analog nodes
-and event-driven nodes iterated for consistency across the entire system. Once stable values
-are obtained for all nodes in the system, the analysis halts and the results could be displayed
-or printed out.
- A DC analysis is automatically performed prior to a transient analysis to determine
-the transient initial conditions, and prior to an ac small-signal analysis to determine the
-linearised, small-signal models for nonlinear devices. The DC analysis can also be used to
-generate dc transfer curves: a specified independent voltage or current source is stepped over a
-user-specified range and the dc output variables are stored for each sequential source
-value.
-
- AC analysis is limited to analog nodes. It represents the small signal, sinusoidal
-solution of the analog system described at a particular frequency or set of frequencies.
-This analysis is similar to the DC analysis in that it represents the steady-state
-behaviour of the described system with a single input node at a given set of stimulus
-frequencies.
-
- The program first computes the dc operating point of the circuit and determines
-linearised, small-signal models for all of the nonlinear devices in the circuit. The resultant
-linear circuit is then analyzed over a user-specified range of frequencies. The desired output
-of an ac small-signal analysis is usually a transfer function (voltage gain, trans
-impedance, etc.). If the circuit has only one ac input, it is convenient to set that input to
-unity and zero phase, so that output variables have the same value as the transfer
-function.
-
- Transient analysis is an extension of DC analysis to the time domain. A transient
-analysis begins by obtaining a DC solution to provide a point of departure for simulating
-time-varying behaviour. Once the DC solution is obtained, the time-dependent aspects of the
-system are reintroduced and the simulator algorithms incrementally solve for the time varying
-behaviour of the entire system. Inconsistencies in node values are resolved by the simulation
-algorithms such that the time-dependent waveforms created by the analysis are consistent
-across the entire simulated time interval.
- Resulting time-varying descriptions of node behaviour for the specified time interval are
-accessible. All sources which are not time dependent (for example, power supplies) are
-set to their dc value. The transient time interval is specified on a .tran control
-line.
-
- By default DC analysis option appears when one clicks on Analysis Inserter. Here we need
-to give the details of input source name, start value of input, increment and stop value. Once
-this is done, click on Add Simulation Data.
- Fig. 6.2 gives an example of DC analysis inserter. In this example, v1 is the input
-voltage source which starts at 0 Volt, increments by 1 Volt and stops at 10 Volt. On
-clicking Add Simulation Data, the analysis command is generated and is of the form:
- When we check the option Operating Point analysis on the DC analysis window, .op gets
-appended to the analysis statement. The inclusion of the line .op in the analysis file directs Ngspice to determine the dc
-operating point of the circuit with inductors shorted and capacitors opened.
+ Note that the netlist for PCB has an extension .net. The netlist created for simulation
+has an extension .cir.
+ Once the netlist for PCB is created, one needs to map each component in the netlist to a
+footprint. The tool Footprint Editor is used for this. eSim uses CvPcb as its footprint editor.
+CvPcb is the footprint editor tool in KiCad.
+
When one clicks on the option AC in the Analysis Inserter GUI, the window given in
-Fig. 6.3 appears. If one opens the Footprint Editor after creating the .net netlist file, the Footprint editor as
+shown in Fig. 6.3 will be obtained. The menu bar and toolbars and the panes are marked in
+this figure. The menu bar will be available in the top left corner. The left pane has a list of
+components in the netlist file and the right pane has a list of available footprints for each
+component. Here one needs to enter the details of scale, start frequency, stop frequency and Number of
-points.
- After entering these values, click on Add Simulation Data. The analysis statement is
-generated. This is in one of the three forms listed below, depending on the type of scale that
-one chooses. The types of scale available are dec, oct, and lin, the usage of which is explained
-below: If the .ac analysis is included in the analysis file, Ngspice performs an AC analysis of the
-circuit over the specified frequency range. Note that in order for this analysis to be
-meaningful, at least one independent source must have been specified with an ac value. While
-creating the schematic for performing ac analysis, add the component AC from the
-sourcesSpice library.
- When one clicks on the option Transient in the Analysis Inserter GUI, the window given in
-Fig. 6.4 appears. Here one needs to enter the details of start time, step time, and stop time.
-After entering these values, click on Add Simulation Data. The analysis statement is
-generated. It is of the form:
- Here, tstep is the printing or plotting increment for line-printer output. For use
-with the post-processor, tstep is the suggested computing increment. tstop is the
-final time, and tstart is the initial time. If tstart is omitted, it is assumed to be
-zero.
- The transient analysis always begins at time zero. In the interval <zero, tstart>, the
-circuit is analyzed (to reach a steady state), but no outputs are stored. In the interval
-<tstart, tstop>, the circuit is analyzed and outputs are stored. Source details is basically a dynamic tab, i.e. the fields are added as per the circuit. The
-number of sources schematic has like AC,DC is the number of fields that get added in the
-GUI. Consider a Half-Adder circuit as shown in Fig. 6.5 Here, total three DC input source are used and hence the source detail GUI would be
-having three input fields as shown is Fig. 6.6
- Spice based simulators include a feature which allows accurate modeling of semiconductor
-devices such as diodes, transistors etc. Model libraries holds these features to define
-models for devices such as diodes, MOSFET, BJT, JFET, IGBT, Magnetic core
-etc.
- The fields in this tab are added for each such device in the circuit and the corresponding
-model library is added. In the example of bridgerectifier as shown in Fig. 6.7 for four diodes
-library files are added as in Fig. 6.8 Sub-circuiting is the way of hierarchical modeling. The sub circuit file in the main circuits
-needs to be added before converting it. Let us consider the simple example of Full-Adder
-circuit containing two half adder sub circuits.
-
- After Filling up the values in all the above mentioned fields the convert button is pressed for
-the conversion process to finish. If all the files are added the successful message box is
-popped on the screen as shown in Fig. 6.9. Then click ok, this will create the .cir.out,
-analysis and other files in the project folders.
- After the Kicad to Ngspice conversion is successfully completed simulation tab on the toolbar
-is clicked to check the output waveform of the project. The windows shown if Fig. 6.10 and
-Fig. 6.11 are opned in dockarea.
- Following are the commands to be given in Ngspice window.
- The output in the ngspice window is shown in Fig. 6.12 Likewise, in the pythonplot window the checkbox of a particular source can be chosen
-and then PLOT button is clicked. This output in pythonplot window is shown in
-Fig. 6.13
- In Chapter 5, we have seen the differences between schematic for simulation and schematic
-for PCB design. Let us design the PCB for an RC circuit. A resistor, capacitor, ground, power
-flag and a connector are required. Connectors are used to take signals in and out of the
-PCB.
- Create the circuit schematic as shown in Fig. 7.1. The two pin connector (CONN_2) can
-be placed from the EEschema library conn. See Sec. ?? to know more about EEschema
-library conn. Do the annotation and test for ERC. Refer to Chapter 5 to know more about
-basic steps in schematic creation.
- The netlist for PCB is different from that for simulation. To generate netlist for PCB, click on
-the Generate netlist tool from the top toolbar in Schematic editor. In the Netlist window,
-under the tab Pcbnew, click on the button Netlist. This is shown in Fig. 7.2. Click on
-Save in the Save netlist file dialog box that opens up. Do not change the directory
-or the name of the netlist file. Save the schematic and close the schematic editor.
- Note that the netlist for PCB has an extension .net. The netlist created for simulation
-has an extension .cir.
- Once the netlist for PCB is created, one needs to map each component in the netlist to a
-footprint. The tool Footprint Editor is used for this. eSim uses CvPcb as its footprint editor.
-CvPcb is the footprint editor tool in KiCad.
-
- If one opens the Footprint Editor after creating the .net netlist file, the Footprint editor as
-shown in Fig. 7.3 will be obtained. The menu bar and toolbars and the panes are marked in
-this figure. The menu bar will be available in the top left corner. The left pane has a list of
-components in the netlist file and the right pane has a list of available footprints for each
-component. Note that if the Footprint Editor is opened before creating a ‘.net’ file, then the left and
+class="content">Footprint editor with the menu bar, toolbar, left pane and right pane
+marked Note that if the Footprint Editor is opened before creating a ‘.net’ file, then the left and
right panes will be empty.
Some of the important tools in the toolbar are shown in Fig. 7.4. They are explained below:
+ id="x1-460006.1.3">Toolbar
+ Some of the important tools in the toolbar are shown in Fig. 6.4. They are explained below:
To view a footprint in 2D, select it from the right pane and click on
+ To view a footprint in 2D, select it from the right pane and click on View selected footprint
from the menu bar. Let us view the footprint for SM1210. Choose SM1210 from
the right pane as shown in Fig. 7.5. On clicking the 6.5. On clicking the View selected footprint tool,
the Footprint window with the view in 2D will be displayed. Click on the 3D
tool in the Footprint window, as shown in Fig. 7.6. A top view of the selected
+href="#x1-470046">6.6. A top view of the selected
footprint in 3D is obtained. Click on the footprint and rotate it using mouse to get 3D
views from various angles. One such side view of the footprint in 3D is shown in
Fig. 7.7.
- Click on Click on C1 from the left pane. Choose the footprint C1 from the right pane by double
clicking on it. Click on connector 7.1.5 R3 for the resistor R1. The
footprint mapping is shown in Fig. 7.8. Save the footprint association by clicking on the 6.8. Save the footprint association by clicking on the Save
netlist and footprint files tool from the 7.1.5
+ id="x1-480018">
- Note that one needs to browse to the directory where the schematic file is saved and save
the ‘.net’ file in the same directory.
- The next step is to place the footprints and lay tracks between them to get the layout. This is
+ id="dx1-49002">
+ The next step is to place the footprints and lay tracks between them to get the layout. This is
done using the Layout Editor tool. eSim uses Pcbnew, the layout creation tool in KiCad, as its
layout editor.
-
-
+ The layout editor with the various menu bar and toolbars is shown in Fig. 7.9.
+ id="dx1-50001">
+ The layout editor with the various menu bar and toolbars is shown in Fig. 6.9.
Some of the important menu options in the top menu bar are shown in Fig. 7.10. They are
+ id="x1-510006.2.1">Top toolbar
+ Some of the important menu options in the top menu bar are shown in Fig. 6.10. They are
explained below:
-
+ A list of hotkeys are given below:
+ id="dx1-52001">
+ A list of hotkeys are given below:
The list can be viewed by selecting The list can be viewed by selecting Preferences from the top menu bar and choosing List Current
Keys from the option Hotkeys.
-
-
+ Click on
+ Click on Layout Editor from the eSim toolbar. Click on Read Netlist tool from the top
toolbar. Click on 7.2.3 Netlist on the Netlist window. The message area in the Netlist window says that
the RC_pcb.net has been read. The sequence of operations is shown in Fig. 7.11.
+href="#x1-5300411">6.11.
The footprint modules will now be imported to the top left hand corner of the layout
+ The footprint modules will now be imported to the top left hand corner of the layout
editor window. This is shown in Fig. 7.12. Zoom in to the top left corner by pressing the key Zoom in to the top left corner by pressing the key F1 or using the scroll button of the
mouse. The zoomed in version of the imported netlist is shown in Fig. 7.13.
- Let us now place this in the center of the layout editor window. Let us now place this in the center of the layout editor window. Click on Click on Mode footprint: Manual/automatic move and place tool from the top toolbar.
Place the cursor near the center of the layout editor window. Right click and choose Glob
move and place. Choose move all modules. The sequence of operations is shown in Fig. 7.14.
+href="#x1-5300714">6.14.
Click on Yes on the confirmation window to move the modules. Zoom in using the F1 key.
The current placement of components after zooming in is shown in Fig. 7.15a.
+href="#x1-53008r1">6.15a.
We need to arrange the modules properly to lay tracks. Rotate the connector P1 by
+ We need to arrange the modules properly to lay tracks. Rotate the connector P1 by
placing the cursor on top of P1 and pressing R. Move it by placing the cursor on top of it and
pressing M. The final placement is shown in Fig. 7.15b.
- Let us now lay the tracks. Let us first change the track width. Click on 6.15b.
+ Let us now lay the tracks. Let us first change the track width. Click on Design rules from
the top menu bar. Click on Design rules. This is shown in Fig. 7.16. The 6.16. The Design Rules Editor
window opens up. Here one can edit the various design rules. Double click on the track width
field to edit it. Type 0.8 and press Enter. Click on OK. Fig. 7.17 shows the sequence of
+href="#x1-5301517">6.17 shows the sequence of
operations. Click on Click on Back from the Layer options as shown in Fig. 7.18. Let us now start laying the tracks. Place the cursor above the left terminal of R1
+ Let us now start laying the tracks. Place the cursor above the left terminal of R1
in the layout editor window. Press the key x. Move the cursor down and double
click on the left terminal of C1. A track is formed. This is shown in Fig. 7.19a.
+href="#x1-53018r1">6.19a.
Similarly lay the track between capacitor C1 and connector P1 as shown in
+ Similarly lay the track between capacitor C1 and connector P1 as shown in
Fig. 7.19b. The last track needs to be laid at an angle. To do so, place the cursor
+href="#x1-53019r2">6.19b. The last track needs to be laid at an angle. To do so, place the cursor
above the second terminal of R1. Press the key x and move the cursor diagonally
down. Double click on the other terminal of the connector. The track will be laid
as shown in Fig. 7.19c. All tracks are now laid. The next step is to create PCB
+href="#x1-53020r3">6.19c. All tracks are now laid. The next step is to create PCB
edges.
- Choose Choose PCB_edges from the Layer options to add edges. Click on Add graphic line or
polygon from the toolbar on the left. Fig. 7.20 shows the sequence of operations. Let us now
+href="#x1-5302320">6.20 shows the sequence of operations. Let us now
start drawing edges for PCB. Click to the left of the layout. Move cursor horizontally to the right. Click once to change
+ Click to the left of the layout. Move cursor horizontally to the right. Click once to change
orientation. Move cursor vertically down. Draw the edges as shown in Fig. 7.21. Double click
+href="#x1-5302421">6.21. Double click
to finish drawing the edges. Click on Click on Perform design rules check from the top toolbar to check for design rules. The
DRC Control window opens up. Click on 7.2.3 messages tab. Click on OK to close DRC control window. Fig. 7.22 shows the sequence of
+href="#x1-5302622">6.22 shows the sequence of
operations. Click on Click on Save board on the top toolbar.
- To generate Gerber files, click on To generate Gerber files, click on File from the top menu bar. Click on Plot. This is shown
in Fig. 7.23. The plot window opens up. One can choose which layers to plot by
+href="#x1-5302823">6.23. The plot window opens up. One can choose which layers to plot by
selecting/deselecting them from the Layers pane on the left side. One can also choose the
format used to plot them. Choose 7.2.3 Plot. The message window shows the location
in which the Gerber files are created. Click on Close. This is shown in Fig. 7.24.
+href="#x1-5302924">6.24.
The PCB design of RC circuit is now complete. To know more about Pcbnew, refer to
+ The PCB design of RC circuit is now complete. To know more about Pcbnew, refer to
[15] or [16].
- Spice based simulators include a feature which allows accurate modeling of semiconductor
-devices such as diodes, transistors etc. eSim Model Builder provides a facility to define a new
-model for devices such as diodes, MOSFET, BJT, JFET, IGBT, Magnetic core etc. Model
-Builder in eSim lets the user enter the values of parameters depending on the type of device
-for which a model is required. The parameter values can be obtained from the data-sheet
-of the device. A newly created model can be exported to the model library and
-one can import it for different projects, whenever required. Model Builder also
+devices such as diodes, transistors etc. eSim Model Editor provides a facility to define a new
+model for devices such as diodes, MOSFET, BJT, JFET, IGBT, Magnetic core etc. Model
+Editor in eSim lets the user enter the values of parameters depending on the type of
+device for which a model is required. The parameter values can be obtained from the
+data-sheet of the device. A newly created model can be exported to the model library
+and one can import it for different projects, whenever required. Model Editor also
provides a facility to edit existing models. The GUI of the model editor is as shown in
Fig. 8.1
+href="#x1-540011">7.1
eSim lets used create new model libraries based on the template model libraries. on selecting
+ eSim lets us create new model libraries based on the template model libraries. On selecting
New button the window is popped to name the new library file. The library file has to be
-unique otherwise the error message appears on the window.
+class="cmtt-10x-x-109">New After the OK button is pressed the type of model library to be created is chosen by
+ After the OK button is pressed the type of model library to be created is chosen by
selecting one of the types on the left hand side i.e. Diode, BJT, MOS, JFET, IGBT,
Magnetic Core. The template model library is then opened in the tabular form. As shown in
-Fig. 8.3
- The new parameters can be added or a current parameters can be removed using ADD
+ New parameters can be added or current parameters can be removed using ADD
and REMOVE buttons. Also the values of parameters can be changed in the table. The
-adding and removing of the parameters in a library files is as shown in the Fig. 8.4 and
+class="cmtt-10x-x-109">REMOVE After the editing of the model library is done the file can be saved selecting the SAVE
+ After the editing of the model library is done, the file can be saved by selecting the SAVE
button. These libraries are saved in the Use Libraries folder under DecviceModelLibrary folder
-in the project folder.
- The current model library can be saved using EDIT option. On clicking the EDIT button the
-file dialog opens where all the library files are saved as shown in Fig. 8.6
- The existing model library can be modified using EDIT option. On clicking the EDIT button
+the file dialog opens where all the library files are saved as shown in Fig. 7.6. You can select
+the library you want to edit. Once you are done with the editing, click on SAVE
+button.
+ Further on clicking the SAVE button the edited model library is saved in the Use
+>Figure 7.6: Editing Existing Model Library eSim directly cannot use the external .lib file. It has to be uploaded to eSim repository before
+using it in a circuit. eSim provides the facility to upload library files. They are then converted
+into xml format, which can be easily modified from the eSim interface. On clicking UPLOAD
+button the library can be uploaded from any location. The model library will be
+saved with the name you have provided, in the User Libraries folder of repository
Libraries folder under DecviceModelLibrary folder in the project folder.
- eSim can not read the model library file in the .lib form. The file needs to be converted into
-XML so as to make it readable and editable in model editor. Any new netlist that user wants
-to use in the eSim need to be convertedinto xml before using it in a project. hence eSim
-provides us to upload the new netlist which converts in into xml. on clicking UPLOAD button
-the netlist can be uploaded from any location and further on saving the file the model library
-can be saved in the Use Libraries folder under DecviceModelLibrary folder in the project
-folder with different name.
-
-
+class="cmti-10x-x-109">deviceModelLibrary Let us take an example of Half-adder circuit. To create a new sub circuit select the New
-Subcircuit Schematic.Fig. 9.2 shows the half-adder circuit and Fig. 9.3 shows the block of the
-sub circuit included in the main circuit. The steps to create subcircuit are as follows.
+ NOTE: All the input and output of the sub circuits are connected to the port component.
- After creating the schematic kicad netlist is generated as explained in section and convert
-kicad to Ngspice where cir.out and .sub files are generated. The number of input and
-output ports of the subcircuit is to matched with number of connections in the
-main circuit. eSim provides this validation of mapping of the sub circuit ports.
-Also the respective input and output ports can be checked by reading the .sub
-file.
-
-
-
-
- Plot the Input and Output Waveform of RC ckt where the input voltage (Vs) is
-50Hz, 3V peak to peak. Value for Resistor (R) and Capacitor(C) is 1k and 1uf
-respectively.
-
- Draw the schematic and label the nodes as shown in Fig. A.1a using the schematic editor.
-Annotate the schematic using the Annotate tool from the top toolbar in Schematic editor.
-Perform Electric Rules check using the Perform electric rules check tool from the top toolbar.
-Ensure that there are no errors in the circuit schematic. Now generate Spice netlist for
-simulation using the Generate Netlist tool from the top toolbar. This is shown
-Fig. A.1.
- Next step is to convert kicad netlist to ngspice netlist by click on icon Convert Kicad to
-Ngspice. Then Fill the Analysis tab with Transisent option selected as given in Fig. A.2.
-Enter start time = 0ms, step time = 1ms, stop time = 100ms.
- Now Click on Sources Details Tab to Enter Sine Source Values as shown in
-Fig. A.4.
- Then Press Convert Button which will generate Ngspice Netlist (rc.cir.out)
- Now Click on Simulation icon to open Ngspice Plot and Python Plot shown in Fig. A.5
-And Fig. A.6.
-
+ The steps to edit a subcircuit are as follows.
+
+
+
Plot the Input and Output Waveform of Half Wave Rectifier ckt where the input voltage (Vs)
-is 50Hz, 2V peak to peak. Value for Resistor (R) is 1k respectively
-
-
+ id="x1-640009.1.1">Problem Statement:
+ Plot the Input and Output Waveform of an RC circuit whose input voltage (Vs) is 50Hz,
+3V peak to peak. The values of Resistor (R) and Capacitor(C) are 1k and 1uf
+respectively.
Draw the schematic and label the nodes as shown in Fig. A.7 using the schematic editor.
-Annotate the schematic using the Annotate tool from the top toolbar in Schematic editor.
-Perform Electric Rules check using the Perform electric rules check tool from the top toolbar.
-Ensure that there are no errors in the circuit schematic. Now generate Spice netlist for
-simulation using the Generate Netlist tool from the top toolbar. This is shown in
-Fig. A.8.
- Next step is to convert kicad netlist to ngspice netlist by click on icon Convert Kicad to
-Ngspice. Then Fill the Analysis tab with Transisent option selected as given in Fig. A.9.
-Enter start time = 0ms, step time = 1ms, stop time = 100ms. Now Click on Sources Details
-Tab to Enter Sine Source Values as shown in Fig. A.10. Now Click on Device Model Tab to
-ADD Diode model to the circuit shown in Fig. A.11. (Note Details about Device Model is
-expained in earlier chapter Model Builder.)
- Then Press Convert Button which will generate Ngspice Netlist (Halfwave-Rectifier.cir.out)
- Now Click on Simulation icon to open Ngspice Plot and Python Plot shown in Fig. A.12
-And Fig. A.13
- To create a schematic in KiCad, we need to place the required components. Fig. 9.3
+ shows the icon on the right toolbar which opens the component library.
+ After all the required components of the simple RC circuit are placed, wiring is done
+ using the Place Wire option as shown in the Fig. 9.4
+ Next step is ERC (Electric Rules Check). Fig. 9.5 shows the icon for ERC.
+ Fig. 9.6 shows the RC circuit after connecting the components by wire.
+ After clicking the ERC icon a window opens up. Click the Run button to run rules check.
+ The errors are listed in as shown in Fig. 9.7a. This error is handled by adding Power
+ Flag as shown in Fig. 9.7b.
+ After adding the Power Flag the completed RC circuit is shown in Fig. 9.8a and the
+ netlist is generated as shown in Fig. 9.8b.
+
- Plot the Input and Output Waveform of Inverting Amplifier ckt where the input voltage (Vs)
-is 50Hz, 2V peak to peak and gain is 2.
- Draw the schematic and label the nodes as shown in Fig. A.14. using the schematic editor.
-Annotate the schematic using the Annotate tool from the top toolbar in Schematic editor.
-Perform Electric Rules check using the Perform electric rules check tool from the top toolbar.
-Ensure that there are no errors in the circuit schematic. Now generate Spice netlist for
-simulation using the Generate Netlist tool from the top toolbar. This is shown in
-Fig. A.15.
- Next step is to convert kicad netlist to ngspice netlist by click on icon Convert Kicad to
-Ngspice. Then Fill the Analysis tab with Transisent option selected as given in
-Fig. A.16. Enter start time = 0ms, step time = 1ms, stop time = 100ms. Now
-Click on Sources Details Tab to Enter Sine Source Values as shown in Fig. A.17.
-Now Click on Subciruits Tab to ADD UA741 Subcircut to the circuit shown in
-Fig. A.18 (Note Details about Subcircuit is expained in earlier chapter Subcircuit
-Builder.)
- Then Press Convert Button which will generate Ngspice Netlist (Inverting-Amplifier.cir.out)
- Now Click on Simulation icon to open Ngspice Plot and Python Plot shown in Fig. A.20
-and Fig. A.19.
- Now you can enter the type of analysis and source details as shown in Fig. 9.10a and
+ Fig. 9.10b respectively.
+ The other tab will be empty as RC circuit do not use any Ngspice model, device library
+ and subcircuit.
+ After entering the value, press the convert button. It will convert the netlist into
+ Ngspice compatible netlist.
-
-
-
- In eSim, there are two types of plot. First is normal Ngspice plot and second is
+ interactive python plot as shown in Fig. 9.12a and Fig. 9.12b respectively.
+ In the interactive python plot you can select any node or branch to plot voltage or
+ current across it. Also it has the facility to plot basic functions across the node like
+ addition, substraction, multiplication, division and v/s.
+
+
+ Plot the Input and Output Waveform of Half Wave Rectifier circuit where the input voltage
+(Vs) is 50Hz, 2V peak to peak. The value for Resistor (R) is 1k.
+
+ The new project is created by clicking the New icon on the menubar. The name of the project
+is given in the window shown in Fig. 9.1.
+ After the KiCad window is opened, to create a schematic we need to place the
+ required components. Fig. 9.3 shows the icon on the right toolbar which opens
+ the component library. After all the required components of the simple Half Wave rectifier circuits are
+ placed, wiring is done using the Place Wire option as shown in the Fig. 9.4 Next step is ERC (Electric Rules Check). Fig. 9.5 shows the icon for ERC. After
+ completing all the above steps the final Half Wave Rectifier schematic will look
+ like Fig. 9.13. KiCad netlist is generated as shown in the Fig. 9.14 Under device library you can add the library for diode used in the circuit. If you do not
+ add any library it will take default Ngspice model.
+
+
+
Plot the Input and Output Waveform of Precision Reectifier ckt where the input voltage (Vs)
-is 50Hz, 3V peak to peak.
-
+ id="x1-700009.1.3">Problem Statement:
+ Plot the input and output waveform of the Precision Rectifier circuit where input voltage
+(Vs) is 50Hz , 3V peak to peak.
+
Draw the schematic and label the nodes as shown in Fig. D.1a using the schematic editor.
-Annotate the schematic using the Annotate tool from the top toolbar in Schematic editor.
-Perform Electric Rules check using the Perform electric rules check tool from the top toolbar.
-Ensure that there are no errors in the circuit schematic. Now generate Spice netlist for
-simulation using the Generate Netlist tool from the top toolbar. This is shown in
-Fig. A.22.
- Next step is to convert kicad netlist to ngspice netlist by click on icon Convert Kicad to
-Ngspice. Then Fill the Analysis tab with Transisent option selected as given in
-Fig. A.23. Enter start time = 0ms, step time = 1 ms, stop time = 100 ms. Now Click
-on Sources Details Tab to Enter Sine Source Values as shown in Fig. A.24. Now
-Click on Device Model Tab to ADD Diode model to the circuit shown in Fig. A.25.
-(Note Details about Device Model is expained in earlier chapter Model Builder.)
-Then Click on Subciruits Tab to ADD UA741 Subcircut to the circuit shown in
-Fig. A.26. (Note Details about Subcircuit is expained in earlier chapter Subcircuit
-Builder.)
- Then Press Convert Button which will generate Ngspice Netlist (Precision-Rectifier.cir.out)
- Now Click on Simulation icon to open Ngspice Plot and Python Plot shown in Fig. A.27
-and Fig. A.28.
- The new project is created by clicking the New icon on the menubar. The name of the project
+is given as shown in the Fig. 9.1.
+ The KiCad netlist is generated as shown in Fig. 9.18. This will open converter window where you can enter details of Analysis, Source values,
+ Device library and Subcircuit.
+ Under device library you can add the library for the diode used in the circuit. If you do
+ not add any library it will take default Ngspice model for diode. Under subcircuit tab you have to add the subciruit used in your circuit. If you forget to
+ add subcircuit it will throw an error.
-
+
+ Plot the Input and Output Waveform of Inverting Amplifier circuit where the input voltage
+(Vs) is 50Hz, 2V peak to peak and gain is 2.
+ The Fig. 9.21 shows the complete Precision Rectifier schematic after removing
+ the errors.
+ The KiCad netlist is generated as shown in Fig. 9.22. This will open converter window where you can enter details of Analysis, Source values,
+ Device library and Subcircuit.
+
+ Subcircuit of Op-Amp is shown in Fig. 9.23d Under subcircuit tab you have to add the subciruit used in your circuit. If you forget to
+ add subcircuit, it will throw an error.
+
+
Plot the Input and Output Waveform of Half Adder ckt.
-
+ id="x1-760009.1.5">Problem Statement:
+ Plot the Input and Output Waveform of Half Adder circuit.
+
Draw the schematic and label the nodes as shown in Fig. A.29 using the schematic editor.
-[Note : To create any Digital Circuits ADCs and DACs must be connected to input and
-output of the circuit.] Annotate the schematic using the Annotate tool from the top toolbar in
-Schematic editor. Perform Electric Rules check using the Perform electric rules check tool
-from the top toolbar. Ensure that there are no errors in the circuit schematic. Now generate
-Spice netlist for simulation using the Generate Netlist tool from the top toolbar. This is
-shown in Fig. A.30.
- Next step is to convert kicad netlist to ngspice netlist by click on icon Convert Kicad to
-Ngspice. Then Fill the Analysis tab with Transisent option selected as given in Fig. A.31.
-Enter start time = 0ms, step time = 1ms, stop time = 100ms. Now Click on Sources Details
-Tab to Enter Sine Source Values as shown in Fig. A.32. Click on Ngspice Model Tab and
-Enter the Details of Ngspice Models else keep it empty where it will select default values as
-shown in Fig. A.33 Then Click on Subciruits Tab to ADD half-adder Subcircut to the circuit
-shown in Fig. A.34. (Note Details about Subcircuit is expained in earlier chapter Subcircuit
-Builder.)
- Then Press Convert Button which will generate Ngspice Netlist (Half-Adder.cir.out)
- Now Click on Simulation icon to open Ngspice Plot and Python Plot shown in Fig. A.35
-and Fig. A.36.
- The Fig. 9.25 shows the complete Half Adder schematic after removing the
+ errors. The KiCad netlist is generated as shown in Fig. 9.26. This will open converter window where you can enter details of Analysis, Source values,
+ Ngspice model and Subcircuit.
+ Subcircuit of Half Adder in Fig. 9.28
+ (b)
+ Half
+ Adder
+ Python
+ Plot
+
[1] CSI Communications, vol. 35, no. 6, pp. 10–12, September 2011,
available at http://spoken-_tutorial.org/CSI.pdf.
+href="http://spoken-tutorial.org/CSI.pdf" class="url" >http://spoken-tutorial.org/CSI.pdf.
[3] (2013, May). [Online]. Available:
http://scilab-_test.garudaindia.in/scilab_in/,_http://scilab-_test.garudaindia.in/cloud
+href="http://scilab-test.garudaindia.in/scilab_in/,
http://scilab-test.garudaindia.in/cloud" class="url" >http://scilab-test.garudaindia.in/scilab_in/,http://scilab-test.garudaindia.in/cloud
[5] (2013, May) Synaptic Package Manager Spoken Tutorial. [Online]. Available:
http://www.spoken-_tutorial.org/list_videos?view=1&foss=Linux&language=English
+href="http://www.spoken-tutorial.org/list_videos?view=1&foss=Linux&language=English" class="url" >http://www.spoken-tutorial.org/list_videos?view=1&foss=Linux&language=English
[11] (2013, May). [Online]. Available:
http://www.kicad-_pcb.org/display/KICAD/KiCad+EDA+Software+Suite
+href="http://www.kicad-pcb.org/display/KICAD/KiCad+EDA+Software+Suite" class="url" >http://www.kicad-pcb.org/display/KICAD/KiCad+EDA+Software+Suite
[12] J.-P. Charras and F. Tappero. (2013, May). [Online]. Available:
http://www.kicad-_pcb.org/display/KICAD/KiCad+Documentation
+href="http://www.kicad-pcb.org/display/KICAD/KiCad+Documentation" class="url" >http://www.kicad-pcb.org/display/KICAD/KiCad+Documentation
@@ -4221,13 +3642,13 @@
[17] P. Nenzi and H. Vogt. (2013) Ngspice users manual version 25plus. [Online].
Available: http://ngspice.sourceforge.net/docs/ngspice-_manual.pdf
+href="http://ngspice.sourceforge.net/docs/ngspice-manual.pdf" class="url" >http://ngspice.sourceforge.net/docs/ngspice-manual.pdf
[18]
[19] (2013, May). [Online]. Available: http://www.spoken-_tutorial.org/
+href="http://www.spoken-tutorial.org/" class="url" >http://www.spoken-tutorial.org/
[20]
+ id="x1-3800211">
-
-
Figure 5.11: Editing value of resistor
+class="content">Editing value of resistor
+
5.2.4 Annotation and ERC
+ id="x1-390005.2.4">Annotation and ERC
+ id="dx1-39001">
+ id="dx1-39002">
+ id="dx1-39003">
-
-
+
+ id="x1-3900813">
-
-
Figure 5.13: Steps in annotating a schematic: 1. First click on Annotation then 2. Click
-on Ok then 3. Click on close
+on Ok then 3. Click on close
-
+5.14.
+ id="x1-3900914">
-
-
Figure 5.14: Green arrow pointing to Ground terminal indicating an ERC error
+class="content">Green arrow pointing to Ground terminal indicating an ERC error
-
+5.2.5 Netlist generation
+ id="x1-400005.2.5">Netlist generation
-
+ id="x1-4000315">
-
-
Figure 5.15: Steps in generating a Netlist for simulation: 1. Click on Spice then 2.
Check the option Default Format then 3. Click on Netlist
+class="cmtt-10x-x-109">Default Format then 3. Click on Generate
-
+Chapter 6
Circuit simulation uses mathematical models to replicate the
-behaviour of an actual device or circuit. Simulation software allows to model circuit
-operations. Simulating a circuit’s behaviour before actually building it can greatly improve
-design efficiency. eSim uses Ngspice for analog, digital and mixed-level/mixed-signal circuit
-simulation. The various steps involved in simulating a circuit schematic in eSim are given
-below:
-
Simulation
-
-
- 6.1 Analysis Inserter
-
-Schematic creation for PCB design
+
+ id="x1-420011">
-
-
Figure 6.1: Analysis Inserter GUI
+class="content">Final circuit schematic for RC low pass circuit
+
6.1.1 Types of analysis
-
-DC analysis
+ id="dx1-43001">
-AC small-signal analysis
-
-Transient analysis
-
-6.1.2 DC analysis inserter
-
.dc sourcename vstart vstop vincr
The .dc line defines the dc transfer curve source and sweep limits (with capacitors open and
-inductors shorted). srcnam is the name of an independent voltage or current source. vstart,
+class="cmti-10x-x-109">Generate netlist Save in the Save netlist file dialog box that opens up. Do not change the directory
+or the name of the netlist file. Save the schematic and close the schematic editor.
+
-
-
+6.1.2 Mapping of components using Footprint Editor
+
+
+
+6.1.3 AC analysis inserter
+ id="x1-450006.1.3">Familiarising the Footprint Editor tool
-
+
+
+
-
.ac dec nd fstart fstop
.ac oct no fstart fstop
.ac lin np fstart fstop
Here, dec stands for decade variation and nd is the number of points per decade. oct stands
-for octave variation and no is the number of points per octave. lin stands for linear variation
-and np is the number of points. fstart is the starting frequency and fstop is the final
-frequency.
-6.1.4 Transient analysis inserter
-
-
- 6.2 Adding Source Details
-
-
- 6.3 Adding Ngspice Model
-6.4 Adding Device Model Library
-
-
- 6.5 Adding Sub Circuit
-6.6 Kicad to Ngspice Conversion
-
- 6.7 Simulation
-
-
-
-
-
-
-
- Chapter 7
Printed Circuit Board (PCB) design is an important step in
-electronic system design. Every component of the circuit needs to be placed and connections
-routed to minimise delay and area. Each component has an associated footprint. Footprint
-refers to the physical layout of a component that is required to mount it on the PCB. PCB
-design involves associating footprints to all components, placing them appropriately to
-minimise wire length and area, connecting the footprints using tracks/vias and finally
-extracting the required files needed for printing the PCB. Let us see the steps to design PCB
-using eSim.
-
PCB Design7.1 Schematic creation for PCB design
-
- 7.1.1 Netlist generation for PCB
-
-
-
-7.1.2 Mapping of components using Footprint Editor
-
-
-
-7.1.3 Familiarising the Footprint Editor tool
-
-
-
-
-
-
-
-
Figure 7.3: Footprint editor with the menu bar, toolbar, left pane and right pane
-marked
-
-
-
+Toolbar
-
+ id="x1-460014">
-
-
Figure 7.4: Some important tools in the toolbar
+>Figure 6.4: Some important tools in the toolbar
+
- 7.1.4 Viewing footprints in 2D and 3D
+ 6.1.4 Viewing footprints in 2D and 3D
+ id="dx1-47001">
-6.7.
+
+ id="x1-470035">
-
-
Figure 7.5: Figure 6.5: Viewing footprint for SM1210: 1. Choose the footprint SM1210 from the
right pane, 2. Click on View selected footprint
+class="cmti-10x-x-109">View selected footprint
-
+
+ id="x1-470046">
-
-
Figure 7.6: Figure 6.6: Footprint view in 2D. Click on 3D to get 3D view
+class="cmti-10x-x-109">3D to get 3D view
-
+
+ id="x1-470057">
-
-
Figure 7.7: Side view of the footprint in 3D
+>Figure 6.7: Side view of the footprint in 3D
- 7.1.5 Mapping of components in the RC circuit
-
+ 6.1.5 Mapping of components in the RC circuit
+
Figure 7.8: Footprint mapping done
+>Figure 6.8: Footprint mapping done
-
-
+7.2 Creation of PCB layout
+ 6.2 Creation of PCB layout
+ id="dx1-49001">
-7.2.1 Familiarizing the Layout Editor tool
+6.2.1 Familiarizing the Layout Editor tool
-
+ id="x1-500029">
-
-
Figure 7.9: Layout editor with menu bar, toolbars and layer options marked
+>Figure 6.9: Layout editor with menu bar, toolbars and layer options marked
-
+
+ id="x1-5000310">
-
-
Figure 7.10: Top toolbar with important tools marked
+>Figure 6.10: Top toolbar with important tools marked
+
Top toolbar
-7.2.2 Hotkeys
+6.2.2 Hotkeys
-
-7.2.2
7.2.3 PCB design example using RC circuit
+6.2.3 PCB design example using RC circuit
-
+ id="x1-5300411">
-
-
Figure 7.11: Figure 6.11: Importing netlist file to layout editor: 1. Browse netlist Files, 2. Choose
-the RC_pcb.net file, 3. Read Netlist file, 4. Close
+the RC_pcb.net file, 3. Read Netlist file, 4. Close
-
+6.12.
+ id="x1-5300512">
-
-
Figure 7.12: Footprint modules imported to top left corner of layout editor window
+>Figure 6.12: Footprint modules imported to top left corner of layout editor window
-
+6.13.
+
+ id="x1-5300613">
-
-
Figure 7.13: Zoomed in version of the imported netlist
+>Figure 6.13: Zoomed in version of the imported netlist
-
+
+ id="x1-5300714">
-
-
Figure 7.14: Figure 6.14: Moving and placing modules to the center of layout editor. 1. Click on
Mode footprint: Manual/automatic move and place, 2. Place cursor at center of layout
@@ -2808,18 +1950,18 @@
+class="cmti-10x-x-109">Modules.7.2.3 Glob Move and Place
and then choose Move All
Modules.
-
+
+ id="x1-5301015">
-
-
+
Figure 7.15: Different stages of placement of modules on PCB
+>Figure 6.15: Different stages of placement of modules on PCB
-
+
+ id="x1-5301416">
-
-
Figure 7.16: Figure 6.16: Choose Design Rules from the top menu bar and Design Rules again
+class="cmti-10x-x-109">Design Rules again
-
+
+ id="x1-5301517">
-
-
Figure 7.17: Figure 6.17: Changing the track width: 1. Double click on Track Width field and type
0.8, 2. Click on OK
+class="cmti-10x-x-109">OK
-
+6.18.
+ id="x1-5301718">
-
-
Figure 7.18: Figure 6.18: Choosing the copper layer Back
+class="cmti-10x-x-109">Back
-
+
+ id="x1-5302119">
-
-
+
7.2.3 and
capacitor
7.2.3 and
connector
7.2.3 resistor
Figure 7.19: Different stages of laying tracks during PCB design
+>Figure 6.19: Different stages of laying tracks during PCB design
-
+
+ id="x1-5302320">
-
-
Figure 7.20: Figure 6.20: Creating PCB edges: 1. Choose PCB_Edges from Layer options 2. Choose
Add graphic line or polygon from left toolbar
+class="cmti-10x-x-109">Add graphic line or polygon from left toolbar
-
+
-
-
+
+ id="x1-5302622">
-
-
Figure 7.22: Figure 6.22: Performing design rules check: 1. Click on Start DRC, 2. Click on Ok
+class="cmti-10x-x-109">Ok
-
+
+ id="x1-5302823">
-
-
Figure 7.23: Figure 6.23: Choosing Plot from the File menu
+class="cmti-10x-x-109">File menu
-
+
+ id="x1-5302924">
-
-
Figure 7.24: Figure 6.24: Creating Gerber files: 1. Choose Gerber as the plot format, 2. Click on
Plot. Message window shows location in which Gerber files are created, 3. Click on Close
+class="cmti-10x-x-109">Close
-
+Chapter 8
+
Model EditorChapter 7
Model Editor
- 8.1 Creating New Model Library
-7.1 Creating New Model Library
+
-Magnetic Core. The template model library opens up in a tabular form as shown in Fig. 7.3
+
+ id="x1-550023">
-
+
+
Figure 8.3: Choosing the Template Model Library
+>Figure 7.3: Choosing the Template Model Library
-
-
+ id="x1-550034">
Figure 8.4: Adding the Parameter in a Library
+>Figure 7.4: Adding the Parameter in a Library
+ id="x1-550045">
Figure 8.5: Removing a Parameter from a Library
+>Figure 7.5: Removing a Parameter from a Library
-8.2 Editing Current Model Library
-User Libraries folder under deviceModelLibrary
+repository.
+
+
+7.2 Editing Current Model Library
+
-
+ 7.3 Uploading external .lib file to eSim repository
+8.3 Converting Library file to XML file
-Chapter 9
Subcircuit is a way to implement hierarchical modeling.
+
Sub-Circuit BuilderChapter 8
Subcircuit is a way to implement hierarchical modeling.
Once a subcircuit for a compo- nent is created, it can be used in other circuits.
-eSim provides an easy way to create a subcircuit. Thw Following Fig. 9.1 shows
-the window that is opened when the Sub-CIrcuit tool is chosen from the toolbar.
+eSim provides an easy way to create a subcircuit. The following Fig. 8.1 shows
+the window that is opened when the SubCircuit tool is chosen from the toolbar.
SubCircuit Builder
- 9.1 Creating a Sub-Circuit
-
-
-
-
-
+
-
+
+
+
-Appendix A
-
Solved ExamplesA.1 Solved Examples
-A.1.1 Basic RC Circuit
-Problem Statement-
-Solution-
-
+
-
+
-
+
+
-
+
-
+
-
-
-
-
-
+
-
-
+
+
-
+>Figure 8.8: Half-Adder Subcircuit Block
+
+
-
Figure A.6: Python Plot of RC Circuit
+ 8.2 Edit a Subcircuit
+
+
-
- A.1.2 Half Wave Rectifier
-Chapter 9
+
Solved Examples9.1 Solved Examples
+9.1.1 Basic RC Circuit
+Problem Statement-
-Solution-
-
-
-
-
-
-
-Solution:
+
+
-
+
+
+
-
+
+
-
+
+
+
+
-
+
+
+
-
-
+
-
- A.1.3 Inverting Amplifier
-Problem Statement-
-Solution-
-(a)
+ Schematic
+ of RC
+ circuit
+ (b)
+ Generating
+ KiCad
+ Netlist
+ of RC
+ circuit
+
Figure 9.8: RC Schematic and Netlist Generation
+
-
-
-
-
+
-
+
+
-
+
+
+
-(a)
+ Ngspice
+ Plot
+ of RC
+ (b)
+ Python
+ Plot
+ of RC
+
Figure 9.12: Ngspice and Interactive Python Plotting
+
+ 9.1.2 Half Wave Rectifier
+Problem Statement:
+Solution:
+
+
-
+
+
+
+
-
+>Figure 9.13: Schematic of Half Wave Rectifier circuit
+
-
-
-
-
+
-Figure 9.14: Half Wave Rectifier circuit Netlist Generation
+
+
-
-
-
-
-
(a)
+ Half
+ Wave
+ Rectifier
+ Analysis
-
Figure A.19: Ngspice Plot of Inverting Amplifier circuit
-
-
-(b)
+ Half
+ Wave
+ Rectifier
+ Source
+ Details
-
-
-
-
-
(c)
+ Half
+ Wave
+ Rectifier
+ Device
+ Modeling
+
Figure 9.15: Analysis, Source and Device Tab
+
+
+(a)
+Ngspice
+Plot
+of
+Half
+Wave
+Rectifier
-
Figure A.20: Python Plot of Inverting Amplifier Circuit
-
-
+ (b)
+ Python
+ Plot
+ of
+ Half
+ Wave
+ Rectifier
+
Figure 9.16: Half Wave Rectifier Simulation Output
+
+ A.1.4 Precision Rectifier
-9.1.3 Precision Rectifier
+Problem Statement-
-Solution -
-
-
-
-
-
-Solution:
+
+
After the KiCad window is opened, to create a schematic we need to place the
+ required components. Fig. 9.3 shows the icon on the right toolbar which opens
+ the component library.
After all the required components of the precision rectifier circuit are placed,
+ wiring is done using the Place Wire option as shown in the Fig. 9.4.
Next step is ERC (Electric Rules Check). Fig. 9.5 shows the icon for ERC. The
+ Fig. 9.17 shows the complete Precision Rectifier schematic after removing the
+ errors.
+
-
+
+
+
-
+
-
+
+
-
-
-
-
-
-(a)
+ Precision
+ Rectifier
+ Analysis
-
Figure A.24: Precision Rectifier Source Details
-
-
-
-
-
-
-
-(b)
+ Precision
+ Rectifier
+ Source
+ Details
+
+
-
Figure A.25: Device Modelling of Precision Rectifier circuit
-
-
-
-
-
-
-
-
+ (c)
+Precision
+Rectifier
+Device
+Modeling
+ (d)
+ Precision
+ Rectifier
+ Subcircuit
Figure A.26: Precision Rectifier Sub-circuit
+>Figure 9.19: Analysis, Source, Device library and Subcircuit tab
+
+
-
+
+(a)
+Ngspice
+Plot
+of
+Precision
+Rectifier
+ (b)
+ Python
+ Plot
+ of
+ Precision
+ Rectifier
+
Figure 9.20: Precision Rectifier Simulation Output
+
+ 9.1.4 Inverting Amplifier
+Problem Statement:
+Solution:
+
+
After the KiCad window is opened, to create a schematic we need to place the
+ required components. Fig. 9.3 shows the icon on the right toolbar which opens
+ the component library.
After all the required components of the inverting amplifier circuit are placed,
+ wiring is done using the Place Wire option as shown in the Fig. 9.4.
Next step is ERC (Electric Rules Check). Fig. 9.5 shows the icon for ERC.
+
-Figure 9.21: Schematic of Inverting Amplifier circuit
+
+
+
+
+(a)
+Inverting
+Amplifier
+Analysis
+ (b)
+ Inverting
+ Amplifier
+ Source
+ Details
+
+
+(c)
+Inverting
+Amplifier
+Subcircuit
+ (d)
+ Sub-Circuit
+ of
+ Op-Amp
+
Figure 9.23: Analysis, Source, and Subcircuit tab
+
+
+
+(a)
+Inverting
+Amplifier
+Ngspice
+Plot
-
-
-
+
+(b)
+Inverting
+Amplifier
+Python
+Plot
Figure A.28: Python Plot of Precision Rectifier Circuit
-
-
+>Figure 9.24: Inverting Amplifier Simulation Output
+
+ A.1.5 Half Adder Example
-9.1.5 Half Adder Example
+Problem Statement-
-Solution -
-
-
-
-
-
-Solution:
+
+
After the KiCad window is opened, to create a schematic we need to place the
+ required components. Fig. 9.3 shows the icon on the right toolbar which opens
+ the component library.
After all the required components of the Half Adder circuit are placed, wiring is
+ done using the Place Wire option as shown in the Fig. 9.4.
Next step is ERC (Electric Rules Check). Fig. 9.5 shows the icon for ERC.
+
-
+
+
+ 
Figure A.30: Half Adder circuit Netlist Generation
+>Figure 9.26: Half Adder circuit Netlist Generation
-
-
-
-
-
-
-
+
+
-
-
-
-
-
-
-(b)
+ Half
+ Adder
+ Source
+ Details
+
+
-
Figure A.33: Ngspice Plot of Half Adder circuit
-
-
-
-
-
-
-
-(c)
+Half
+Adder
+Ngspice
+Model
+ (d)
+ Half
+ Adder
+ Subcircuit
+ Model
Figure A.34: Ngspice Plot of Half Adder circuit
-
-
-
+
+
-
+
-
+
-
-
Figure 9.29: Half Adder Simulation Output
+
+ References
+ id="x1-780009.1.5">References
D. Jahshan and P. Hutchinson. (2013, May). [Online]. Available:
http://bazaar.launchpad.net/∼kicad-_developers/kicad/doc/files/head:/doc/tutorials/
+class="cmsy-8">∼
kicad-developers/kicad/doc/files/head:/doc/tutorials/
-
-
-
-